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Message-Id: <20190814072649.8237-3-yinbo.zhu@nxp.com>
Date:   Wed, 14 Aug 2019 15:26:48 +0800
From:   Yinbo Zhu <yinbo.zhu@....com>
To:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Li Yang <leoyang.li@....com>,
        Claudiu Manoil <claudiu.manoil@....com>,
        Amit Jain <amit.jain_1@....com>, Yangbo Lu <yangbo.lu@....com>,
        Vabhav Sharma <vabhav.sharma@....com>,
        Rajesh Bhagat <rajesh.bhagat@....com>,
        Ashish Kumar <Ashish.Kumar@....com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org
Cc:     yinbo.zhu@....com, xiaobo.xie@....com, jiafei.pan@....com,
        Alison Wang <alison.wang@....com>,
        Alex Marginean <alexandru.marginean@....com>,
        Catalin Horghidan <catalin.horghidan@....com>,
        Rajat Srivastava <rajat.srivastava@....com>,
        linuxppc-dev@...ts.ozlabs.org
Subject: [PATCH v1 3/4] arm64: dts: ls1028a: fix little-big endian issue for dcfg

dcfg use little endian that SoC register value will be correct

Signed-off-by: Yinbo Zhu <yinbo.zhu@....com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index b0d4f8916ede..5538e8e354b2 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -162,7 +162,7 @@
 		dcfg: syscon@...0000 {
 			compatible = "fsl,ls1028a-dcfg", "syscon";
 			reg = <0x0 0x1e00000 0x0 0x10000>;
-			big-endian;
+			little-endian;
 		};
 
 		scfg: syscon@...0000 {
-- 
2.17.1

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