linux-kernel - RE: [EXT] Re: [v1 2/3] dt/bindings: clk: Add DT bindings for LS1028A Display output interface

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Message-ID: <DB7PR04MB51950A726D59F17EE269F2F3E2AD0@DB7PR04MB5195.eurprd04.prod.outlook.com>
Date:   Wed, 14 Aug 2019 09:49:29 +0000
From:   Wen He <wen.he_1@....com>
To:     Stephen Boyd <sboyd@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:     Leo Li <leoyang.li@....com>,
        "liviu.dudau@....com" <liviu.dudau@....com>
Subject: RE: [EXT] Re: [v1 2/3] dt/bindings: clk: Add DT bindings for LS1028A
 Display output interface



> -----Original Message-----
> From: Stephen Boyd <sboyd@...nel.org>
> Sent: 2019年8月14日 2:30
> To: Mark Rutland <mark.rutland@....com>; Michael Turquette
> <mturquette@...libre.com>; Rob Herring <robh+dt@...nel.org>; Shawn Guo
> <shawnguo@...nel.org>; Wen He <wen.he_1@....com>;
> devicetree@...r.kernel.org; linux-clk@...r.kernel.org;
> linux-kernel@...r.kernel.org
> Cc: Leo Li <leoyang.li@....com>; liviu.dudau@....com; Wen He
> <wen.he_1@....com>
> Subject: [EXT] Re: [v1 2/3] dt/bindings: clk: Add DT bindings for LS1028A
> Display output interface
> 
> Caution: EXT Email
> 
> Quoting Wen He (2019-08-12 03:02:16)
> > diff --git a/Documentation/devicetree/bindings/clock/fsl,plldig.txt
> > b/Documentation/devicetree/bindings/clock/fsl,plldig.txt
> > new file mode 100644
> > index 000000000000..29c5a6117809
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/fsl,plldig.txt
> > @@ -0,0 +1,26 @@
> > +NXP QorIQ Layerscape LS1028A Display output interface Clock
> > +===========================================================
> 
> Can you convert this to YAML?

Sure, no problem.

> 
> > +
> > +Required properties:
> > +    - compatible: shall contain "fsl,ls1028a-plldig"
> > +    - reg: Physical base address and size of the block registers
> > +    - #clock-cells: shall contain 1.
> 
> As I said in the previous patch, this should probably be 0. Also, please order
> this before the driver in the patch series and thread your messages please. If
> you use git-send-email this is done for you pretty easily.

Understand, Will prepare and send next version patch.

Best Regards,
Wen

> 
> > +    - clocks: a phandle + clock-specifier pairs, here should be
> > +    specify the reference clock of the system
> > +
> > +