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Message-ID: <1565782684.3209.70.camel@nxp.com>
Date: Wed, 14 Aug 2019 11:38:04 +0000
From: Robert Chiras <robert.chiras@....com>
To: "stefan@...er.ch" <stefan@...er.ch>
CC: dl-linux-imx <linux-imx@....com>, "marex@...x.de" <marex@...x.de>,
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Subject: Re: [EXT] Re: [PATCH v2 04/15] drm/mxsfb: Reset vital register for a
proper initialization
Hi Stefan,
On Mi, 2019-08-14 at 13:11 +0200, Stefan Agner wrote:
> On 2019-08-14 12:48, Robert Chiras wrote:
> >
> > Some of the regiters need, like LCDC_CTRL and
> > CTRL2_OUTSTANDING_REQS
> Typo in registers, and there is a need to many.
Thanks, will fix this.
>
> >
> > needs to be properly cleared and initialized for a better start and
> > stop
> > routine.
>
>
> >
> >
> > Signed-off-by: Robert Chiras <robert.chiras@....com>
> > ---
> > drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> > b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> > index b69ace8..5e44f57 100644
> > --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> > +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> > @@ -127,6 +127,10 @@ static void mxsfb_enable_controller(struct
> > mxsfb_drm_private *mxsfb)
> > clk_prepare_enable(mxsfb->clk_disp_axi);
> > clk_prepare_enable(mxsfb->clk);
> >
> > + if (mxsfb->devdata->ipversion >= 4)
> > + writel(CTRL2_OUTSTANDING_REQS(REQ_16),
> > + mxsfb->base + LCDC_V4_CTRL2 + REG_SET);
> > +
> > /* If it was disabled, re-enable the mode again */
> > writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET);
> >
> > @@ -136,12 +140,19 @@ static void mxsfb_enable_controller(struct
> > mxsfb_drm_private *mxsfb)
> > writel(reg, mxsfb->base + LCDC_VDCTRL4);
> >
> > writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET);
> > + writel(CTRL1_RECOVERY_ON_UNDERFLOW, mxsfb->base + LCDC_CTRL1
> > + REG_SET);
> This seems not to be accounted for in the commit message. Can you do
> this in a separate commit?
>
> Also I suggest to introduce CTRL1_RECOVERY_ON_UNDERFLOW in that same
> commit.
You are right, I missed this one in the description. I will add this
one too.
>
> --
> Stefan
>
> >
> > }
> >
> > static void mxsfb_disable_controller(struct mxsfb_drm_private
> > *mxsfb)
> > {
> > u32 reg;
> >
> > + if (mxsfb->devdata->ipversion >= 4)
> > + writel(CTRL2_OUTSTANDING_REQS(0x7),
> > + mxsfb->base + LCDC_V4_CTRL2 + REG_CLR);
> > +
> > + writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_CLR);
> > +
> > /*
> > * Even if we disable the controller here, it will still
> > continue
> > * until its FIFOs are running out of data
> > @@ -295,6 +306,7 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private
> > *mxsfb)
> > dma_addr_t paddr;
> >
> > mxsfb_enable_axi_clk(mxsfb);
> > + writel(0, mxsfb->base + LCDC_CTRL);
> > mxsfb_crtc_mode_set_nofb(mxsfb);
> >
> > /* Write cur_buf as well to avoid an initial corrupt frame */
Thanks,
Robert
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