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Message-ID: <CAHp75VcKNZeq80hw5qjKKuh8Qg=WUrXPSpcy6yx5h-_7RHah+g@mail.gmail.com>
Date: Thu, 15 Aug 2019 16:10:24 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Wei Xu <xuwei5@...ilicon.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Linus Walleij <linus.walleij@...aro.org>,
Linuxarm <linuxarm@...wei.com>,
Shameerali Kolothum Thodi
<shameerali.kolothum.thodi@...wei.com>,
Jonathan Cameron <jonathan.cameron@...wei.com>,
John Garry <john.garry@...wei.com>,
Salil Mehta <salil.mehta@...wei.com>,
Shiju Jose <shiju.jose@...wei.com>, jinying@...ilicon.com,
Zhangyi ac <zhangyi.ac@...wei.com>,
"Liguozhu (Kenneth)" <liguozhu@...ilicon.com>,
Tangkunshan <tangkunshan@...wei.com>,
huangdaode <huangdaode@...ilicon.com>
Subject: Re: [PATCH] gpio: pl061: Fix the issue failed to register the ACPI interruption
On Mon, Aug 12, 2019 at 2:30 PM Wei Xu <xuwei5@...ilicon.com> wrote:
>
> Invoke acpi_gpiochip_request_interrupts after the acpi data has been
> attached to the pl061 acpi node to register interruption.
>
> Otherwise it will be failed to register interruption for the ACPI case.
> Because in the gpiochip_add_data_with_key, acpi_gpiochip_add is invoked
> after gpiochip_add_irqchip but at that time the acpi data has not been
> attached yet.
>
> Tested with below steps on QEMU v4.1.0-rc3 and Linux kernel v5.3-rc4,
> and found pl061 interruption is missed in the /proc/interrupts:
> 1.
> qemu-system-aarch64 \
> -machine virt,gic-version=3 -cpu cortex-a57 \
> -m 1G,maxmem=4G,slots=4 \
> -kernel Image -initrd rootfs.cpio.gz \
> -net none -nographic \
> -bios QEMU_EFI.fd \
> -append "console=ttyAMA0 acpi=force earlycon=pl011,0x9000000"
>
> 2. cat /proc/interrupts in the guest console:
> estuary:/$ cat /proc/interrupts
> CPU0
> 2: 3228 GICv3 27 Level arch_timer
> 4: 15 GICv3 33 Level uart-pl011
> 42: 0 GICv3 23 Level arm-pmu
> IPI0: 0 Rescheduling interrupts
> IPI1: 0 Function call interrupts
> IPI2: 0 CPU stop interrupts
> IPI3: 0 CPU stop (for crash dump) interrupts
> IPI4: 0 Timer broadcast interrupts
> IPI5: 0 IRQ work interrupts
> IPI6: 0 CPU wake-up interrupts
> Err: 0
>
> Fixes: 04ce935c6b2a ("gpio: pl061: Pass irqchip when adding gpiochip")
Linus, I'm wondering if we can do this for all inside the GPIO library.
Thoughts?
--
With Best Regards,
Andy Shevchenko
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