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Message-ID: <CAL_JsqLp4BB+=kdGkMuH+-QQWHt8vRB_DSxjDYBFHLcHUg5V=A@mail.gmail.com>
Date: Thu, 15 Aug 2019 07:49:23 -0600
From: Rob Herring <robh+dt@...nel.org>
To: Wen He <wen.he_1@....com>
Cc: linux-devel@...ux.nxdi.nxp.com,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Shawn Guo <shawnguo@...nel.org>, devicetree@...r.kernel.org,
linux-clk <linux-clk@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Yang-Leo Li <leoyang.li@....com>,
Liviu Dudau <liviu.dudau@....com>
Subject: Re: [v2 1/3] dt/bindings: clk: Add YAML schemas for LS1028A Display
Clock bindings
On Thu, Aug 15, 2019 at 4:26 AM Wen He <wen.he_1@....com> wrote:
>
> LS1028A has a clock domain PXLCLK0 used for provide pixel clocks to Display
> output interface. Add a YAML schema for this.
>
> Signed-off-by: Wen He <wen.he_1@....com>
> ---
> change in v2:
> - Convert bindings to YAML format
>
> .../devicetree/bindings/clock/fsl,plldig.yaml | 43 +++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/fsl,plldig.yaml
Reviewed-by: Rob Herring <robh@...nel.org>
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