| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <175edc67-e0e0-f690-704e-b74b110eda16@redhat.com>
Date: Thu, 15 Aug 2019 19:24:30 +0200
From: Hans de Goede <hdegoede@...hat.com>
To: Daniel Stuart <daniel.stuart14@...il.com>
Cc: cezary.rojewski@...el.com,
Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>,
Liam Girdwood <liam.r.girdwood@...ux.intel.com>,
Jie Yang <yang.jie@...ux.intel.com>,
Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>,
Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>,
Daniel Stuart <daniel.stuart@...pr.edu.br>,
Thomas Gleixner <tglx@...utronix.de>,
alsa-devel@...a-project.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ASoC: intel: cht_bsw_max98090_ti: Add all Chromebooks
that need pmc_plt_clk_0 quirk
Hi,
On 15-08-19 19:12, Daniel Stuart wrote:
> Every single baytrail chromebook sets PMC to 0, as can be seeing
> below by searching through coreboot source code:
> $ grep -rl "PMC_PLT_CLK\[0\]" .
> ./rambi/variants/glimmer/devicetree.cb
> ./rambi/variants/clapper/devicetree.cb
> ./rambi/variants/swanky/devicetree.cb
> ./rambi/variants/enguarde/devicetree.cb
> ./rambi/variants/winky/devicetree.cb
> ./rambi/variants/kip/devicetree.cb
> ./rambi/variants/squawks/devicetree.cb
> ./rambi/variants/orco/devicetree.cb
> ./rambi/variants/ninja/devicetree.cb
> ./rambi/variants/heli/devicetree.cb
> ./rambi/variants/sumo/devicetree.cb
> ./rambi/variants/banjo/devicetree.cb
> ./rambi/variants/candy/devicetree.cb
> ./rambi/variants/gnawty/devicetree.cb
> ./rambi/variants/rambi/devicetree.cb
> ./rambi/variants/quawks/devicetree.cb
>
> Plus, Cyan (only non-baytrail chromebook with max98090) also needs
> this patch for audio to work.
>
> Thus, this commit adds all the missing devices to bsw_max98090 quirk
> table, implemented by commit a182ecd3809c ("ASoC: intel:
> cht_bsw_max98090_ti: Add quirk for boards using pmc_plt_clk_0").
>
> Signed-off-by: Daniel Stuart <daniel.stuart14@...il.com>
Thank you for catching this, this patch looks good to me:
Reviewed-by: Hans de Goede <hdegoede@...hat.com>
Regards,
Hans
> ---
> sound/soc/intel/boards/cht_bsw_max98090_ti.c | 98 ++++++++++++++++++++
> 1 file changed, 98 insertions(+)
>
> diff --git a/sound/soc/intel/boards/cht_bsw_max98090_ti.c b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
> index 33eb72545be6..83b978e7b4c4 100644
> --- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c
> +++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
> @@ -399,6 +399,20 @@ static struct snd_soc_card snd_soc_card_cht = {
> };
>
> static const struct dmi_system_id cht_max98090_quirk_table[] = {
> + {
> + /* Banjo model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Banjo"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Candy model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Candy"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> {
> /* Clapper model Chromebook */
> .matches = {
> @@ -406,6 +420,27 @@ static const struct dmi_system_id cht_max98090_quirk_table[] = {
> },
> .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> },
> + {
> + /* Cyan model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Cyan"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Enguarde model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Enguarde"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Glimmer model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> {
> /* Gnawty model Chromebook (Acer Chromebook CB3-111) */
> .matches = {
> @@ -413,6 +448,62 @@ static const struct dmi_system_id cht_max98090_quirk_table[] = {
> },
> .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> },
> + {
> + /* Heli model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Heli"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Kip model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Kip"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Ninja model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Ninja"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Orco model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Orco"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Quawks model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Quawks"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Rambi model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Rambi"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Squawks model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Squawks"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> + {
> + /* Sumo model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Sumo"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> {
> /* Swanky model Chromebook (Toshiba Chromebook 2) */
> .matches = {
> @@ -420,6 +511,13 @@ static const struct dmi_system_id cht_max98090_quirk_table[] = {
> },
> .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> },
> + {
> + /* Winky model Chromebook */
> + .matches = {
> + DMI_MATCH(DMI_PRODUCT_NAME, "Winky"),
> + },
> + .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
> + },
> {}
> };
>
>
Powered by blists - more mailing lists