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Message-ID: <AM5PR04MB3299ABCA78FB6B105F4BCDC7F5AF0@AM5PR04MB3299.eurprd04.prod.outlook.com>
Date: Fri, 16 Aug 2019 11:14:53 +0000
From: Xiaowei Bao <xiaowei.bao@....com>
To: Kishon Vijay Abraham I <kishon@...com>,
Andrew Murray <andrew.murray@....com>
CC: "jingoohan1@...il.com" <jingoohan1@...il.com>,
"gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
Leo Li <leoyang.li@....com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"arnd@...db.de" <arnd@...db.de>,
"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
"M.h. Lian" <minghuan.lian@....com>,
Mingkai Hu <mingkai.hu@....com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"Z.q. Hou" <zhiqiang.hou@....com>
Subject: RE: [PATCH 02/10] PCI: designware-ep: Add the doorbell mode of MSI-X
in EP mode
> -----Original Message-----
> From: Kishon Vijay Abraham I <kishon@...com>
> Sent: 2019年8月16日 18:50
> To: Xiaowei Bao <xiaowei.bao@....com>; Andrew Murray
> <andrew.murray@....com>
> Cc: jingoohan1@...il.com; gustavo.pimentel@...opsys.com;
> bhelgaas@...gle.com; robh+dt@...nel.org; mark.rutland@....com;
> shawnguo@...nel.org; Leo Li <leoyang.li@....com>;
> lorenzo.pieralisi@....com; arnd@...db.de; gregkh@...uxfoundation.org;
> M.h. Lian <minghuan.lian@....com>; Mingkai Hu <mingkai.hu@....com>;
> linux-pci@...r.kernel.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linuxppc-dev@...ts.ozlabs.org; Z.q. Hou <zhiqiang.hou@....com>
> Subject: Re: [PATCH 02/10] PCI: designware-ep: Add the doorbell mode of
> MSI-X in EP mode
>
> Hi,
>
> On 16/08/19 8:28 AM, Xiaowei Bao wrote:
> >
> >
> >> -----Original Message-----
> >> From: Andrew Murray <andrew.murray@....com>
> >> Sent: 2019年8月15日 19:54
> >> To: Xiaowei Bao <xiaowei.bao@....com>
> >> Cc: jingoohan1@...il.com; gustavo.pimentel@...opsys.com;
> >> bhelgaas@...gle.com; robh+dt@...nel.org; mark.rutland@....com;
> >> shawnguo@...nel.org; Leo Li <leoyang.li@....com>; kishon@...com;
> >> lorenzo.pieralisi@....com; arnd@...db.de; gregkh@...uxfoundation.org;
> >> M.h. Lian <minghuan.lian@....com>; Mingkai Hu
> <mingkai.hu@....com>;
> >> Roy Zang <roy.zang@....com>; linux-pci@...r.kernel.org;
> >> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> >> linux-arm-kernel@...ts.infradead.org; linuxppc-dev@...ts.ozlabs.org
> >> Subject: Re: [PATCH 02/10] PCI: designware-ep: Add the doorbell mode
> >> of MSI-X in EP mode
> >>
> >> On Thu, Aug 15, 2019 at 04:37:08PM +0800, Xiaowei Bao wrote:
> >>> Add the doorbell mode of MSI-X in EP mode.
> >>>
> >>> Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
> >>> ---
> >>> drivers/pci/controller/dwc/pcie-designware-ep.c | 14
> ++++++++++++++
> >>> drivers/pci/controller/dwc/pcie-designware.h | 14
> ++++++++++++++
> >>> 2 files changed, 28 insertions(+)
> >>>
> >>> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c
> >>> b/drivers/pci/controller/dwc/pcie-designware-ep.c
> >>> index 75e2955..e3a7cdf 100644
> >>> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> >>> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> >>> @@ -454,6 +454,20 @@ int dw_pcie_ep_raise_msi_irq(struct
> dw_pcie_ep
> >> *ep, u8 func_no,
> >>> return 0;
> >>> }
> >>>
> >>> +int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8
> >> func_no,
> >>> + u16 interrupt_num)
> >>> +{
> >>> + struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> >>> + u32 msg_data;
> >>> +
> >>> + msg_data = (func_no << PCIE_MSIX_DOORBELL_PF_SHIFT) |
> >>> + (interrupt_num - 1);
> >>> +
> >>> + dw_pcie_writel_dbi(pci, PCIE_MSIX_DOORBELL, msg_data);
> >>> +
> >>> + return 0;
> >>> +}
> >>> +
> >>> int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
> >>> u16 interrupt_num)
> >>
> >> Have I understood correctly that the hardware provides an alternative
> >> mechanism that allows for raising MSI-X interrupts without the bother
> >> of reading the capabilities registers?
> > Yes, the hardware provide two way to MSI-X, please check the page 492
> > of
> > DWC_pcie_dm_registers_4.30 Menu.
> > MSIX_DOORBELL_OFF on page 492 0x948 Description: MSI-X Doorbell
> > Register....>
> >>
> >> If so is there any good reason to keep dw_pcie_ep_raise_msix_irq?
> >> (And thus use it in dw_plat_pcie_ep_raise_irq also)?
> > I am not sure, but I think the dw_pcie_ep_raise_msix_irq function is
> > not correct, because I think we can't get the MSIX table from the
> > address ep->phys_base + tbl_addr, but I also don't know where I can get the
> correct MSIX table.
>
> Sometime back when I tried raising MSI-X from EP, it was failing. It's quite
> possible dw_pcie_ep_raise_msix_irq function is not correct.
>
> MSI-X table can be obtained from the inbound ATU corresponding to the MSIX
> bar.
> IMO MSI-X support in EP mode needs rework. For instance set_msix should
> also take BAR number as input to be configured in the MSI-X capability. The
> function driver (pci-epf-test.c) should allocate memory taking into account the
> MSI-X table.
Hi Kishon,
Thanks a lot for your explain, yes, we can get the MSI-X table from the inbound ATU of
the MSIX BAR.
>
> Thanks
> Kishon
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