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Message-Id: <1566109945-11149-1-git-send-email-Anson.Huang@nxp.com>
Date:   Sun, 18 Aug 2019 02:32:19 -0400
From:   Anson Huang <Anson.Huang@....com>
To:     robh+dt@...nel.org, mark.rutland@....com, shawnguo@...nel.org,
        s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
        mturquette@...libre.com, sboyd@...nel.org, rjw@...ysocki.net,
        viresh.kumar@...aro.org, leonard.crestez@....com,
        abel.vesa@....com, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-pm@...r.kernel.org
Cc:     Linux-imx@....com
Subject: [PATCH RESEND V2 1/7] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support

Enable i2c1 on i.MX8MN DDR4 EVK board.

Signed-off-by: Anson Huang <Anson.Huang@....com>
---
No changes.
---
 arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
index 9b2c172..5fce5b1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
@@ -50,6 +50,13 @@
 		>;
 	};
 
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL		0x400001c3
+			MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA		0x400001c3
+		>;
+	};
+
 	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
 		fsl,pins = <
 			MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
@@ -182,6 +189,13 @@
 	};
 };
 
+&i2c1 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+};
+
 &snvs_pwrkey {
 	status = "okay";
 };
-- 
2.7.4

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