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Message-ID: <DB8PR04MB6747E90543E28E5B9EFE7F1684A80@DB8PR04MB6747.eurprd04.prod.outlook.com>
Date:   Mon, 19 Aug 2019 23:57:32 +0000
From:   "Z.q. Hou" <zhiqiang.hou@....com>
To:     Bjorn Helgaas <helgaas@...nel.org>
CC:     "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
        "jingoohan1@...il.com" <jingoohan1@...il.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Leo Li <leoyang.li@....com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "M.h. Lian" <minghuan.lian@....com>
Subject: RE: [PATCH 1/4] dt-bingings: PCI: Remove the num-lanes from Required
 properties

Hi Bjorn,

Thanks a lot for your comments!

> -----Original Message-----
> From: Bjorn Helgaas [mailto:helgaas@...nel.org]
> Sent: 2019年8月20日 3:20
> To: Z.q. Hou <zhiqiang.hou@....com>
> Cc: linux-pci@...r.kernel.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; gustavo.pimentel@...opsys.com;
> jingoohan1@...il.com; robh+dt@...nel.org; mark.rutland@....com;
> shawnguo@...nel.org; Leo Li <leoyang.li@....com>;
> lorenzo.pieralisi@....com; M.h. Lian <minghuan.lian@....com>
> Subject: Re: [PATCH 1/4] dt-bingings: PCI: Remove the num-lanes from
> Required properties
> 
> In subject:
> 
>   s/dt-bingings/dt-bindings/
> 
> Also, possibly
> 
>   s/PCI:/PCI: designware:/
> 

I'll fix them in v2.

Thanks,
Zhiqiang
> since this only applies to designware-pcie.txt.
> 
> On Mon, Aug 12, 2019 at 04:22:16AM +0000, Z.q. Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> >
> > The num-lanes is not a mandatory property, e.g. on FSL Layerscape
> > SoCs, the PCIe link training is completed automatically base on the
> > selected SerDes protocol, it doesn't need the num-lanes to set-up the
> > link width.
> >
> > It has been added in the Optional properties. This patch is to remove
> > it from the Required properties.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > ---
> >  Documentation/devicetree/bindings/pci/designware-pcie.txt | 1 -
> >  1 file changed, 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> > b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> > index 5561a1c060d0..bd880df39a79 100644
> > --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> > +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> > @@ -11,7 +11,6 @@ Required properties:
> >  	     the ATU address space.
> >      (The old way of getting the configuration address space from "ranges"
> >      is deprecated and should be avoided.)
> > -- num-lanes: number of lanes to use
> >  RC mode:
> >  - #address-cells: set to <3>
> >  - #size-cells: set to <2>
> > --
> > 2.17.1
> >

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