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Message-ID: <139b48fd-2fcc-c6bb-ae6b-fb8cbbd82def@codeaurora.org>
Date:   Mon, 19 Aug 2019 18:01:16 +0530
From:   Taniya Das <tdas@...eaurora.org>
To:     Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>
Cc:     David Brown <david.brown@...aro.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, robh@...nel.org
Subject: Re: [PATCH v1 1/2] clk: qcom: Add DT bindings for SC7180 gcc clock
 controller



On 8/8/2019 3:44 AM, Stephen Boyd wrote:
> Quoting Taniya Das (2019-08-07 11:13:00)
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
>> index 8661c3cd3ccf..18d95467cb36 100644
>> --- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt
>> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
>> @@ -23,6 +23,7 @@ Required properties :
>>                          "qcom,gcc-sdm630"
>>                          "qcom,gcc-sdm660"
>>                          "qcom,gcc-sdm845"
>> +                       "qcom,gcc-sc7180"
>>
>>   - reg : shall contain base register location and length
>>   - #clock-cells : shall contain 1
> 
> Can you please list the clk inputs that you're expecting now? Similar to
> what Vinod did for the other most recent GCC driver. We should probably
> convert this binding to YAML.
> 

Thanks Stephen for review, will send the YAML binding in the next patch 
series along with the clock inputs updated.

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QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
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