lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d39bbda2-49ee-a6eb-38f8-347106bbf3ed@broadcom.com>
Date:   Tue, 20 Aug 2019 08:31:48 -0700
From:   Scott Branden <scott.branden@...adcom.com>
To:     Srinath Mannam <srinath.mannam@...adcom.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>
Cc:     bcm-kernel-feedback-list@...adcom.com, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Abhinav Ratna <abhinav.ratna@...adcom.com>
Subject: Re: [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB

Looks good.

On 2019-08-19 9:39 p.m., Srinath Mannam wrote:
> From: Abhinav Ratna <abhinav.ratna@...adcom.com>
>
> IPROC PAXB RC doesn't support ACS capabilities and control registers.
> Add quirk to have separate IOMMU groups for all EPs and functions connected
> to root port, by masking RR/CR/SV/UF bits.
>
> Signed-off-by: Abhinav Ratna <abhinav.ratna@...adcom.com>
> Signed-off-by: Srinath Mannam <srinath.mannam@...adcom.com>
Acked-by: Scott Branden <scott.branden@...adcom.com>
> ---
>   drivers/pci/quirks.c | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 0f16acc..f9584c0 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4466,6 +4466,21 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
>   	return acs_flags ? 0 : 1;
>   }
>   
> +static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
> +{
> +	/*
> +	 * IPROC PAXB RC doesn't support ACS capabilities and control registers.
> +	 * Add quirk to to have separate IOMMU groups for all EPs and functions
> +	 * connected to root port, by masking RR/CR/SV/UF bits.
> +	 */
> +
> +	u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
> +	int ret = acs_flags & ~flags ? 0 : 1;
> +
> +	return ret;
> +}
> +
> +
>   static const struct pci_dev_acs_enabled {
>   	u16 vendor;
>   	u16 device;
> @@ -4559,6 +4574,7 @@ static const struct pci_dev_acs_enabled {
>   	{ PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
>   	{ PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
>   	{ PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> +	{ PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
>   	{ 0 }
>   };
>   

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ