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Message-ID: <DB8PR04MB6747E55FD982EE4C856DF30D84AB0@DB8PR04MB6747.eurprd04.prod.outlook.com>
Date: Tue, 20 Aug 2019 10:04:29 +0000
From: "Z.q. Hou" <zhiqiang.hou@....com>
To: Andrew Murray <andrew.murray@....com>
CC: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
"jingoohan1@...il.com" <jingoohan1@...il.com>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
Leo Li <leoyang.li@....com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"M.h. Lian" <minghuan.lian@....com>
Subject: RE: [PATCHv2 1/4] dt-bindings: PCI: designware: Remove the num-lanes
from Required properties
Hi Andrew,
Thanks a lot for your review!
Thanks,
Zhiqiang
> -----Original Message-----
> From: Andrew Murray <andrew.murray@....com>
> Sent: 2019年8月20日 17:23
> To: Z.q. Hou <zhiqiang.hou@....com>
> Cc: linux-pci@...r.kernel.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; gustavo.pimentel@...opsys.com;
> jingoohan1@...il.com; bhelgaas@...gle.com; robh+dt@...nel.org;
> mark.rutland@....com; shawnguo@...nel.org; Leo Li
> <leoyang.li@....com>; lorenzo.pieralisi@....com; M.h. Lian
> <minghuan.lian@....com>
> Subject: Re: [PATCHv2 1/4] dt-bindings: PCI: designware: Remove the
> num-lanes from Required properties
>
> On Tue, Aug 20, 2019 at 07:28:43AM +0000, Z.q. Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> >
> > The num-lanes is not a mandatory property, e.g. on FSL Layerscape
> > SoCs, the PCIe link training is completed automatically base on the
> > selected SerDes protocol, it doesn't need the num-lanes to set-up the
> > link width.
> >
> > It is previously in both Required and Optional properties, let's
> > remove it from the Required properties.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > ---
>
> Reviewed-by: Andrew Murray <andrew.murray@....com>
>
>
> > V2:
> > - Reworded the change log and subject.
> > - Fixed a typo in subject.
> >
> > Documentation/devicetree/bindings/pci/designware-pcie.txt | 1 -
> > 1 file changed, 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> > b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> > index 5561a1c060d0..bd880df39a79 100644
> > --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> > +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> > @@ -11,7 +11,6 @@ Required properties:
> > the ATU address space.
> > (The old way of getting the configuration address space from
> "ranges"
> > is deprecated and should be avoided.)
> > -- num-lanes: number of lanes to use
> > RC mode:
> > - #address-cells: set to <3>
> > - #size-cells: set to <2>
> > --
> > 2.17.1
> >
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