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Message-ID: <20190820122719.GD31261@centauri>
Date: Tue, 20 Aug 2019 14:27:19 +0200
From: Niklas Cassel <niklas.cassel@...aro.org>
To: Vinod Koul <vkoul@...nel.org>
Cc: Andy Gross <agross@...nel.org>, linux-arm-msm@...r.kernel.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Stephen Boyd <sboyd@...nel.org>,
Sibi Sankar <sibis@...eaurora.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/8] arm64: dts: qcom: pm8150: Add Base DTS file
On Tue, Aug 20, 2019 at 12:12:10PM +0530, Vinod Koul wrote:
> Add base DTS file for pm8150 along with GPIOs, power-on, rtc and vadc
> nodes
>
> Signed-off-by: Vinod Koul <vkoul@...nel.org>
> ---
> arch/arm64/boot/dts/qcom/pm8150.dtsi | 95 ++++++++++++++++++++++++++++
> 1 file changed, 95 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/pm8150.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
> new file mode 100644
> index 000000000000..4a678be46d37
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
> @@ -0,0 +1,95 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> +// Copyright (c) 2019, Linaro Limited
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +#include <dt-bindings/iio/qcom,spmi-vadc.h>
> +
> +&spmi_bus {
> + pm8150_0: pmic@0 {
> + compatible = "qcom,pm8150", "qcom,spmi-pmic";
> + reg = <0x0 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pon: power-on@800 {
> + compatible = "qcom,pm8916-pon";
> + reg = <0x0800>;
> + pwrkey {
> + compatible = "qcom,pm8941-pwrkey";
> + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
Here you use 0 for 3rd cell
> + debounce = <15625>;
> + bias-pull-up;
> + linux,code = <KEY_POWER>;
> +
> + status = "disabled";
> + };
> + };
> +
> + pm8150_adc: adc@...0 {
> + compatible = "qcom,spmi-adc5";
> + reg = <0x3100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #io-channel-cells = <1>;
> + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
Here you use 0x0 for 3rd cell, be consistent.
> +
> + status = "disabled";
> +
> + ref-gnd@0 {
> + reg = <ADC5_REF_GND>;
> + qcom,pre-scaling = <1 1>;
> + label = "ref_gnd";
> + };
> +
> + vref-1p25@1 {
> + reg = <ADC5_1P25VREF>;
> + qcom,pre-scaling = <1 1>;
> + label = "vref_1p25";
> + };
> +
> + die-temp@6 {
> + reg = <ADC5_DIE_TEMP>;
> + qcom,pre-scaling = <1 1>;
> + label = "die_temp";
> + };
> + };
> +
> + rtc@...0 {
> + compatible = "qcom,pm8941-rtc";
> + reg = <0x6000>;
> + reg-names = "rtc", "alarm";
> + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> +
> + status = "disabled";
> + };
> +
> + pm8150_gpios: gpio@...0 {
> + compatible = "qcom,pm8150-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
> + <0 0xc1 0 IRQ_TYPE_NONE>,
> + <0 0xc2 0 IRQ_TYPE_NONE>,
> + <0 0xc3 0 IRQ_TYPE_NONE>,
> + <0 0xc4 0 IRQ_TYPE_NONE>,
> + <0 0xc5 0 IRQ_TYPE_NONE>,
> + <0 0xc6 0 IRQ_TYPE_NONE>,
> + <0 0xc7 0 IRQ_TYPE_NONE>,
> + <0 0xc8 0 IRQ_TYPE_NONE>,
> + <0 0xc9 0 IRQ_TYPE_NONE>,
> + <0 0xca 0 IRQ_TYPE_NONE>,
> + <0 0xcb 0 IRQ_TYPE_NONE>;
> + };
> + };
> +
> + pmic@1 {
> + compatible = "qcom,pm8150", "qcom,spmi-pmic";
> + reg = <0x1 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +};
> --
> 2.20.1
>
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