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Message-ID: <c1033d74-2f92-49c4-02df-54121f904384@huawei.com>
Date:   Thu, 22 Aug 2019 02:40:18 +0800
From:   Zenghui Yu <yuzenghui@...wei.com>
To:     Marc Zyngier <maz@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        "Jason Cooper" <jason@...edaemon.net>,
        Julien Thierry <julien.thierry.kdev@...il.com>,
        Rob Herring <robh+dt@...nel.org>
CC:     Lokesh Vutla <lokeshvutla@...com>,
        John Garry <john.garry@...wei.com>,
        <linux-kernel@...r.kernel.org>,
        Shameerali Kolothum Thodi 
        <shameerali.kolothum.thodi@...wei.com>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 05/12] irqchip/gic: Prepare for more than 16 PPIs

On 2019/8/6 18:01, Marc Zyngier wrote:
> GICv3.1 allows up to 80 PPIs (16 legaci PPIs and 64 Extended PPIs),
                                   ^^^^^^
legacy?


Zenghui

> meaning we can't just leave the old 16 hardcoded everywhere.
> 
> We also need to add the infrastructure to discover the number of PPIs
> on a per redistributor basis, although we still pretend there is only
> 16 of them for now.
> 
> No functional change.
> 
> Signed-off-by: Marc Zyngier <maz@...nel.org>

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