linux-kernel - Re: [PATCH v2 07/11] pinctrl: mediatek: add mt6779 eint support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAGp9Lzpsg2ZjP3Ydj+Fo88FXT_jrV=GnJ+vf4AsSNacwEEx=BA@mail.gmail.com>
Date:   Thu, 22 Aug 2019 11:13:48 -0700
From:   Sean Wang <sean.wang@...nel.org>
To:     Mars Cheng <mars.cheng@...iatek.com>
Cc:     Matthias Brugger <matthias.bgg@...il.com>,
        Rob Herring <robh@...nel.org>,
        Marc Zyngier <marc.zyngier@....com>,
        Stephen Boyd <sboyd@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        CC Hwang <cc.hwang@...iatek.com>,
        Loda Chou <loda.chou@...iatek.com>,
        lkml <linux-kernel@...r.kernel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>, devicetree@...r.kernel.org,
        wsd_upstream@...iatek.com, mtk01761 <wendell.lin@...iatek.com>,
        linux-clk@...r.kernel.org
Subject: Re: [PATCH v2 07/11] pinctrl: mediatek: add mt6779 eint support

On Mon, Aug 19, 2019 at 2:22 AM Mars Cheng <mars.cheng@...iatek.com> wrote:
>
> add driver setting to support mt6779 eint
>
> Signed-off-by: Mars Cheng <mars.cheng@...iatek.com>

Acked-by: Sean Wang <sean.wang@...nel.org>

> ---
>  drivers/pinctrl/mediatek/pinctrl-mt6779.c |    8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6779.c b/drivers/pinctrl/mediatek/pinctrl-mt6779.c
> index 145bf22..49ff3cc 100644
> --- a/drivers/pinctrl/mediatek/pinctrl-mt6779.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mt6779.c
> @@ -731,11 +731,19 @@
>         "iocfg_rt", "iocfg_lt", "iocfg_tl",
>  };
>
> +static const struct mtk_eint_hw mt6779_eint_hw = {
> +       .port_mask = 7,
> +       .ports     = 6,
> +       .ap_num    = 209,
> +       .db_cnt    = 16,
> +};
> +
>  static const struct mtk_pin_soc mt6779_data = {
>         .reg_cal = mt6779_reg_cals,
>         .pins = mtk_pins_mt6779,
>         .npins = ARRAY_SIZE(mtk_pins_mt6779),
>         .ngrps = ARRAY_SIZE(mtk_pins_mt6779),
> +       .eint_hw = &mt6779_eint_hw,
>         .gpio_m = 0,
>         .ies_present = true,
>         .base_names = mt6779_pinctrl_register_base_names,
> --
> 1.7.9.5
>