[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <8e8e85e2-9645-0c1d-0c02-171185567fd9@microchip.com>
Date: Fri, 23 Aug 2019 16:07:46 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <marek.vasut@...il.com>, <vigneshr@...com>,
<boris.brezillon@...labora.com>, <miquel.raynal@...tlin.com>,
<richard@....at>, <linux-mtd@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support
This has nothing to do with the move manufacturer out of the spi-nor core
pursue, but depends on:
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=127030
On 08/23/2019 07:05 PM, Tudor Ambarus - M18064 wrote:
> From: Tudor Ambarus <tudor.ambarus@...rochip.com>
>
> This is similar with what other nor flashes are doing by clearing the
> block protection bits from the status register: disable the write
> protection after a power-on reset cycle.
>
> The Global Block-Protection Unlock command offers a single command cycle
> that unlocks the entire memory array. Prefer this method for higher
> throughput.
>
> Tested on the sst26vf064b flash using the atmel-quadspi driver.
>
> Tudor Ambarus (2):
> mtd: spi-nor: add Global Block Unlock support
> mtd: spi-nor: unlock global block protection on sst26vf064b
>
> drivers/mtd/spi-nor/spi-nor.c | 51 +++++++++++++++++++++++++++++++++++++++++--
> include/linux/mtd/spi-nor.h | 1 +
> 2 files changed, 50 insertions(+), 2 deletions(-)
>
Powered by blists - more mailing lists