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Message-ID: <20190826201346.GJ2168@lunn.ch>
Date:   Mon, 26 Aug 2019 22:13:46 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     Voon Weifeng <weifeng.voon@...el.com>,
        "David S. Miller" <davem@...emloft.net>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        Jose Abreu <joabreu@...opsys.com>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Ong Boon Leong <boon.leong.ong@...el.com>
Subject: Re: [PATCH v1 net-next 4/4] net: stmmac: setup higher frequency clk
 support for EHL & TGL

On Mon, Aug 26, 2019 at 12:55:31PM -0700, Florian Fainelli wrote:
> On 8/26/19 6:38 PM, Voon Weifeng wrote:
> > EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk,
> > ptp clock and ptp_max_adj to 200MHz.
> > 
> > Signed-off-by: Voon Weifeng <weifeng.voon@...el.com>
> > Signed-off-by: Ong Boon Leong <boon.leong.ong@...el.com>
> > ---
> >  drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 21 +++++++++++++++++++++
> >  drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c |  3 +++
> >  include/linux/stmmac.h                           |  1 +
> >  3 files changed, 25 insertions(+)
> > 
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
> > index e969dc9bb9f0..20906287b6d4 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
> > @@ -9,6 +9,7 @@
> >    Author: Giuseppe Cavallaro <peppe.cavallaro@...com>
> >  *******************************************************************************/
> >  
> > +#include <linux/clk-provider.h>
> >  #include <linux/pci.h>
> >  #include <linux/dmi.h>
> >  
> > @@ -174,6 +175,19 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
> >  	plat->axi->axi_blen[1] = 8;
> >  	plat->axi->axi_blen[2] = 16;
> >  
> > +	plat->ptp_max_adj = plat->clk_ptp_rate;
> > +
> > +	/* Set system clock */
> > +	plat->stmmac_clk = clk_register_fixed_rate(&pdev->dev,
> > +						   "stmmac-clk", NULL, 0,
> > +						   plat->clk_ptp_rate);
> > +
> > +	if (IS_ERR(plat->stmmac_clk)) {
> > +		dev_warn(&pdev->dev, "Fail to register stmmac-clk\n");
> > +		plat->stmmac_clk = NULL;
> 
> Don't you need to propagate at least EPROBE_DEFER here?

Hi Florian

Isn't a fixed rate clock a complete fake. There is no hardware behind
it. So can it return EPROBE_DEFER?

    Andrew

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