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Message-ID: <20190827153029.GO14582@e119886-lin.cambridge.arm.com>
Date: Tue, 27 Aug 2019 16:30:29 +0100
From: Andrew Murray <andrew.murray@....com>
To: Vidya Sagar <vidyas@...dia.com>
Cc: lorenzo.pieralisi@....com, bhelgaas@...gle.com, robh+dt@...nel.org,
thierry.reding@...il.com, jonathanh@...dia.com, kishon@...com,
gustavo.pimentel@...opsys.com, digetx@...il.com,
mperttunen@...dia.com, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
kthota@...dia.com, mmaddireddy@...dia.com, sagar.tv@...il.com
Subject: Re: [PATCH 3/6] PCI: tegra: Add support to configure sideband pins
On Mon, Aug 26, 2019 at 01:01:40PM +0530, Vidya Sagar wrote:
> Add support to configure sideband signal pins when information is present
> in respective controller's device-tree node.
>
> Signed-off-by: Vidya Sagar <vidyas@...dia.com>
> ---
> drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index fc0dbeb31d78..8a27b25893c9 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1308,6 +1308,12 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
> return ret;
> }
>
> + ret = pinctrl_pm_select_default_state(pcie->dev);
> + if (ret < 0) {
> + dev_err(pcie->dev, "Failed to configure sideband pins\n");
I think you can just use dev instead of pcie->dev here.
> + return ret;
Don't you need to pm_runtime_put_sync and pm_runtime_disable here?
Thanks,
Andrew Murray
> + }
> +
> tegra_pcie_init_controller(pcie);
>
> pcie->link_state = tegra_pcie_dw_link_up(&pcie->pci);
> --
> 2.17.1
>
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