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Message-ID: <CAARK3H=gNy7o0NL6KCkcBQANoutwhMHE_-nfbfB2NVUATRgemA@mail.gmail.com>
Date: Wed, 28 Aug 2019 11:08:53 -0700
From: Sagar Kadam <sagar.kadam@...ive.com>
To: Bin Meng <bmeng.cn@...il.com>
Cc: Marek Vasut <marek.vasut@...il.com>, tudor.ambarus@...rochip.com,
David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh R <vigneshr@...com>, Albert Ou <aou@...s.berkeley.edu>,
Palmer Dabbelt <palmer@...ive.com>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-mtd <linux-mtd@...ts.infradead.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
linux-riscv <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v8 1/4] mtd: spi-nor: add support for is25wp256
Hi Bin,
On Mon, Aug 26, 2019 at 2:49 AM Bin Meng <bmeng.cn@...il.com> wrote:
>
> On Tue, Aug 13, 2019 at 8:40 PM Sagar Shrikant Kadam
> <sagar.kadam@...ive.com> wrote:
> >
> > Update spi_nor_id table for is25wp256 (32MB) device from ISSI,
> > present on HiFive Unleashed dev board (Rev: A00).
> >
> > Set method to enable quad mode for ISSI device in flash parameters
> > table.
> >
> > Based on code originally written by Wesley Terpstra <wesley@...ive.com>
> > and/or Palmer Dabbelt <palmer@...ive.com>
> > https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
> >
> > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@...ive.com>
> > Reviewed-by: Vignesh Raghavendra <vigneshr@...com>
> > ---
> > drivers/mtd/spi-nor/spi-nor.c | 9 ++++++++-
> > include/linux/mtd/spi-nor.h | 1 +
> > 2 files changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> > index 03cc788..6635127 100644
> > --- a/drivers/mtd/spi-nor/spi-nor.c
> > +++ b/drivers/mtd/spi-nor/spi-nor.c
> > @@ -1946,7 +1946,10 @@ static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
> > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > { "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256,
> > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > -
> > + { "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 1024,
>
> The sector number should be 512, not 1024.
Thanks for pointing this out.
I had rectified it in recent U-boot patchset here
https://patchwork.ozlabs.org/patch/1146522/
but I missed the change in the linux one as it was sent earlier.
I will include this change in the next version of the patch
Thanks & BR,
Sagar
>
> > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> > + SPI_NOR_4B_OPCODES)
> > + },
> > /* Macronix */
> > { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SECT_4K) },
> > { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SECT_4K) },
> > @@ -3776,6 +3779,10 @@ static int spi_nor_init_params(struct spi_nor *nor,
> > case SNOR_MFR_ST:
> > case SNOR_MFR_MICRON:
> > break;
> > + case SNOR_MFR_ISSI:
> > + params->quad_enable = macronix_quad_enable;
> > + break;
> > +
> >
> > default:
> > /* Kept only for backward compatibility purpose. */
> > diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> > index 9f57cdf..5d6583e 100644
> > --- a/include/linux/mtd/spi-nor.h
> > +++ b/include/linux/mtd/spi-nor.h
> > @@ -21,6 +21,7 @@
> > #define SNOR_MFR_INTEL CFI_MFR_INTEL
> > #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */
> > #define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */
> > +#define SNOR_MFR_ISSI 0x9d /* ISSI */
> > #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
> > #define SNOR_MFR_SPANSION CFI_MFR_AMD
> > #define SNOR_MFR_SST CFI_MFR_SST
>
> Regards,
> Bin
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