linux-kernel - Re: [PATCH v1 1/2] dt-bindings: mmc: sdhci-of-arasan: Add new compatible for Intel LGM eMMC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 28 Aug 2019 09:33:14 +0800
From:   "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
To:     Ulf Hansson <ulf.hansson@...aro.org>
Cc:     "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        DTML <devicetree@...r.kernel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Michal Simek <michal.simek@...inx.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        andriy.shevchenko@...el.com, cheol.yong.kim@...el.com,
        qi-ming.wu@...el.com
Subject: Re: [PATCH v1 1/2] dt-bindings: mmc: sdhci-of-arasan: Add new
 compatible for Intel LGM eMMC

Hi Ulf,

On 27/8/2019 9:49 PM, Ulf Hansson wrote:
> On Mon, 26 Aug 2019 at 09:28, Ramuthevar,Vadivel MuruganX
> <vadivel.muruganx.ramuthevar@...ux.intel.com> wrote:
>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
>>
>> Add a new compatible to use the sdhc-arasan host controller driver
>> with the eMMC PHY on Intel's Lightning Mountain SoC.
>>
>> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
> Applied for next, thanks!
>
> Kind regards
> Uffe

Thank you so much for review and applied for next.

Best Regards
Vadivel
>
>> ---
>>   Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 17 +++++++++++++++++
>>   1 file changed, 17 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
>> index 1edbb049cccb..7ca0aa7ccc0b 100644
>> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
>> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
>> @@ -17,6 +17,8 @@ Required Properties:
>>         For this device it is strongly suggested to include arasan,soc-ctl-syscon.
>>       - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY
>>          Note: This binding has been deprecated and moved to [5].
>> +    - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY
>> +      For this device it is strongly suggested to include arasan,soc-ctl-syscon.
>>
>>     [5] Documentation/devicetree/bindings/mmc/sdhci-am654.txt
>>
>> @@ -80,3 +82,18 @@ Example:
>>                  phy-names = "phy_arasan";
>>                  #clock-cells = <0>;
>>          };
>> +
>> +       emmc: sdhci@...00000 {
>> +               compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1";
>> +               reg = <0xec700000 0x300>;
>> +               interrupt-parent = <&ioapic1>;
>> +               interrupts = <44 1>;
>> +               clocks = <&cgu0 LGM_CLK_EMMC5>, <&cgu0 LGM_CLK_NGI>,
>> +                        <&cgu0 LGM_GCLK_EMMC>;
>> +               clock-names = "clk_xin", "clk_ahb", "gate";
>> +               clock-output-names = "emmc_cardclock";
>> +               #clock-cells = <0>;
>> +               phys = <&emmc_phy>;
>> +               phy-names = "phy_arasan";
>> +               arasan,soc-ctl-syscon = <&sysconf>;
>> +       };
>> --
>> 2.11.0
>>