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Message-ID: <1566995328-15158-9-git-send-email-henryc.chen@mediatek.com>
Date: Wed, 28 Aug 2019 20:28:46 +0800
From: Henry Chen <henryc.chen@...iatek.com>
To: Georgi Djakov <georgi.djakov@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Viresh Kumar <vireshk@...nel.org>,
Stephen Boyd <swboyd@...omium.org>,
Ryan Case <ryandcase@...omium.org>
CC: Nicolas Boichat <drinkcat@...gle.com>,
Fan Chen <fan.chen@...iatek.com>,
James Liao <jamesjj.liao@...iatek.com>,
Weiyi Lu <weiyi.lu@...iatek.com>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
Henry Chen <henryc.chen@...iatek.com>
Subject: [PATCH V3 08/10] dt-bindings: interconnect: add MT8183 interconnect dt-bindings
Add interconnect provider dt-bindings for MT8183.
Signed-off-by: Henry Chen <henryc.chen@...iatek.com>
---
.../devicetree/bindings/soc/mediatek/dvfsrc.txt | 9 +++++++++
include/dt-bindings/interconnect/mtk,mt8183-emi.h | 18 ++++++++++++++++++
2 files changed, 27 insertions(+)
create mode 100644 include/dt-bindings/interconnect/mtk,mt8183-emi.h
diff --git a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
index 7f43499..da98ec9 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
@@ -12,6 +12,11 @@ Required Properties:
- clock-names: Must include the following entries:
"dvfsrc": DVFSRC module clock
- clocks: Must contain an entry for each entry in clock-names.
+- #interconnect-cells : should contain 1
+- interconnect : interconnect providers support dram bandwidth requirements.
+ The provider is able to communicate with the DVFSRC and send the dram
+ bandwidth to it. shall contain only one of the following:
+ "mediatek,mt8183-emi"
Example:
@@ -20,4 +25,8 @@ Example:
reg = <0 0x10012000 0 0x1000>;
clocks = <&infracfg CLK_INFRA_DVFSRC>;
clock-names = "dvfsrc";
+ ddr_emi: interconnect {
+ compatible = "mediatek,mt8183-emi";
+ #interconnect-cells = <1>;
+ };
};
diff --git a/include/dt-bindings/interconnect/mtk,mt8183-emi.h b/include/dt-bindings/interconnect/mtk,mt8183-emi.h
new file mode 100644
index 0000000..2a54856
--- /dev/null
+++ b/include/dt-bindings/interconnect/mtk,mt8183-emi.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_MTK_MT8183_EMI_H
+#define __DT_BINDINGS_INTERCONNECT_MTK_MT8183_EMI_H
+
+#define MT8183_SLAVE_DDR_EMI 0
+#define MT8183_MASTER_MCUSYS 1
+#define MT8183_MASTER_GPU 2
+#define MT8183_MASTER_MMSYS 3
+#define MT8183_MASTER_MM_VPU 4
+#define MT8183_MASTER_MM_DISP 5
+#define MT8183_MASTER_MM_VDEC 6
+#define MT8183_MASTER_MM_VENC 7
+#define MT8183_MASTER_MM_CAM 8
+#define MT8183_MASTER_MM_IMG 9
+#define MT8183_MASTER_MM_MDP 10
+
+#endif
--
1.9.1
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