[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20190828134334.qzuwodoxmw7ov5yg@flea>
Date: Wed, 28 Aug 2019 15:43:34 +0200
From: Maxime Ripard <mripard@...nel.org>
To: Chen-Yu Tsai <wens@...e.org>
Cc: Alejandro González
<alejandro.gonzalez.correo@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
Greg KH <gregkh@...uxfoundation.org>,
Thomas Gleixner <tglx@...utronix.de>,
linux-mmc <linux-mmc@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [linux-sunxi] Re: [PATCH] mmc: sunxi: fix unusuable eMMC on some
H6 boards by disabling DDR
On Wed, Aug 28, 2019 at 09:29:32PM +0800, Chen-Yu Tsai wrote:
> On Wed, Aug 28, 2019 at 8:52 PM Linus Walleij <linus.walleij@...aro.org> wrote:
> >
> > On Sun, Aug 25, 2019 at 5:06 PM Alejandro González
> > <alejandro.gonzalez.correo@...il.com> wrote:
> >
> > > Jernej Skrabec compared the BSP driver with this
> > > driver, and found that the BSP driver configures pinctrl to operate at
> > > 1.8 V when entering DDR mode (although 3.3 V operation is supported), while
> > > the mainline kernel lacks any mechanism to switch voltages dynamically.
>
> AFAIK The Pine H64 does not have the ability to switch I/O voltages. It is
> fixed to either 1.8V (the default based on the schematics) or 3.3V.
Should that be handled at the board level then maybe?
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)
Powered by blists - more mailing lists