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Message-ID: <5aaef6f4-4bee-4cc4-8eb0-d9b4c412988b@amd.com>
Date: Wed, 28 Aug 2019 15:17:59 +0000
From: "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@....com>
To: Alexander Graf <graf@...zon.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>
CC: "pbonzini@...hat.com" <pbonzini@...hat.com>,
"rkrcmar@...hat.com" <rkrcmar@...hat.com>,
"joro@...tes.org" <joro@...tes.org>,
"jschoenh@...zon.de" <jschoenh@...zon.de>,
"karahmed@...zon.de" <karahmed@...zon.de>,
"rimasluk@...zon.com" <rimasluk@...zon.com>,
"Grimm, Jon" <Jon.Grimm@....com>
Subject: Re: [PATCH v2 11/15] svm: Temporary deactivate AVIC during ExtINT
handling
Alex,
On 8/19/19 5:35 AM, Alexander Graf wrote:
>
>
> On 15.08.19 18:25, Suthikulpanit, Suravee wrote:
>> AMD AVIC does not support ExtINT. Therefore, AVIC must be temporary
>> deactivated and fall back to using legacy interrupt injection via vINTR
>> and interrupt window.
>>
>> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
>> ---
>> arch/x86/kvm/svm.c | 49
>> +++++++++++++++++++++++++++++++++++++++++++++----
>> 1 file changed, 45 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
>> index cfa4b13..4690351 100644
>> --- a/arch/x86/kvm/svm.c
>> +++ b/arch/x86/kvm/svm.c
>> @@ -384,6 +384,7 @@ struct amd_svm_iommu_ir {
>> static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
>> static void svm_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa);
>> static void svm_complete_interrupts(struct vcpu_svm *svm);
>> +static void svm_request_activate_avic(struct kvm_vcpu *vcpu);
>> static bool svm_get_enable_apicv(struct kvm *kvm);
>> static inline void avic_post_state_restore(struct kvm_vcpu *vcpu);
>> @@ -4494,6 +4495,15 @@ static int interrupt_window_interception(struct
>> vcpu_svm *svm)
>> {
>> kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
>> svm_clear_vintr(svm);
>> +
>> + /*
>> + * For AVIC, the only reason to end up here is ExtINTs.
>> + * In this case AVIC was temporarily disabled for
>> + * requesting the IRQ window and we have to re-enable it.
>> + */
>> + if (svm_get_enable_apicv(svm->vcpu.kvm))
>> + svm_request_activate_avic(&svm->vcpu);
>
> Would it make sense to add a trace point here and to the other call
> sites, so that it becomes obvious in a trace when and why exactly avic
> was active/inactive?
>
> The trace point could add additional information on the why.
Sure, sounds good.
>> ....
>> @@ -5522,9 +5558,6 @@ static void enable_irq_window(struct kvm_vcpu
>> *vcpu)
>> {
>> struct vcpu_svm *svm = to_svm(vcpu);
>> - if (kvm_vcpu_apicv_active(vcpu))
>> - return;
>> -
>> /*
>> * In case GIF=0 we can't rely on the CPU to tell us when GIF
>> becomes
>> * 1, because that's a separate STGI/VMRUN intercept. The next
>> time we
>> @@ -5534,6 +5567,14 @@ static void enable_irq_window(struct kvm_vcpu
>> *vcpu)
>> * window under the assumption that the hardware will set the GIF.
>> */
>> if ((vgif_enabled(svm) || gif_set(svm)) && nested_svm_intr(svm)) {
>> + /*
>> + * IRQ window is not needed when AVIC is enabled,
>> + * unless we have pending ExtINT since it cannot be injected
>> + * via AVIC. In such case, we need to temporarily disable AVIC,
>> + * and fallback to injecting IRQ via V_IRQ.
>> + */
>> + if (kvm_vcpu_apicv_active(vcpu))
>> + svm_request_deactivate_avic(&svm->vcpu);
>
> Did you test AVIC with nesting? Did you actually run across this issue
> there?
Currently, we have not claimed that AVIC is supported w/ nested VM.
That's why we have not enabled AVIC by default yet. We will be looking
more into that next.
Suravee
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