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Message-ID: <20190829161417.tzk4wewlupr4udgd@linux.intel.com>
Date:   Thu, 29 Aug 2019 19:14:17 +0300
From:   Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
To:     Stephen Boyd <swboyd@...omium.org>
Cc:     Peter Huewe <peterhuewe@....de>,
        Andrey Pronin <apronin@...omium.org>,
        linux-kernel@...r.kernel.org, linux-integrity@...r.kernel.org,
        Duncan Laurie <dlaurie@...omium.org>,
        Jason Gunthorpe <jgg@...pe.ca>, Arnd Bergmann <arnd@...db.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Guenter Roeck <groeck@...omium.org>,
        Alexander Steffen <Alexander.Steffen@...ineon.com>,
        Heiko Stuebner <heiko@...ech.de>, Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v5 1/4] dt-bindings: tpm: document properties for cr50

On Wed, Aug 28, 2019 at 01:21:47AM -0700, Stephen Boyd wrote:
> From: Andrey Pronin <apronin@...omium.org>
> 
> Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50
> firmware.
> 
> Cc: Andrey Pronin <apronin@...omium.org>
> Cc: Duncan Laurie <dlaurie@...omium.org>
> Cc: Jason Gunthorpe <jgg@...pe.ca>
> Cc: Arnd Bergmann <arnd@...db.de>
> Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> Cc: Guenter Roeck <groeck@...omium.org>
> Cc: Alexander Steffen <Alexander.Steffen@...ineon.com>
> Cc: Heiko Stuebner <heiko@...ech.de>
> Signed-off-by: Andrey Pronin <apronin@...omium.org>
> Reviewed-by: Rob Herring <robh@...nel.org>
> Signed-off-by: Stephen Boyd <swboyd@...omium.org>
> ---
>  .../bindings/security/tpm/google,cr50.txt     | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/security/tpm/google,cr50.txt
> 
> diff --git a/Documentation/devicetree/bindings/security/tpm/google,cr50.txt b/Documentation/devicetree/bindings/security/tpm/google,cr50.txt
> new file mode 100644
> index 000000000000..cd69c2efdd37
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/security/tpm/google,cr50.txt
> @@ -0,0 +1,19 @@
> +* H1 Secure Microcontroller with Cr50 Firmware on SPI Bus.
> +
> +H1 Secure Microcontroller running Cr50 firmware provides several
> +functions, including TPM-like functionality. It communicates over
> +SPI using the FIFO protocol described in the PTP Spec, section 6.
> +
> +Required properties:
> +- compatible: Should be "google,cr50".
> +- spi-max-frequency: Maximum SPI frequency.
> +
> +Example:
> +
> +&spi0 {
> +	tpm@0 {
> +		compatible = "google,cr50";
> +		reg = <0>;
> +		spi-max-frequency = <800000>;
> +	};
> +};
> -- 
> Sent by a computer through tubes
> 

Acked-by: Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>

/Jarkko

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