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Message-ID: <20190829130459.GG218215@art_vandelay>
Date:   Thu, 29 Aug 2019 09:04:59 -0400
From:   Sean Paul <sean@...rly.run>
To:     Rob Clark <robdclark@...il.com>
Cc:     dri-devel@...ts.freedesktop.org,
        Rob Clark <robdclark@...omium.org>,
        Sean Paul <sean@...rly.run>, David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Jeykumar Sankaran <jsanka@...eaurora.org>,
        Allison Randal <allison@...utok.net>,
        Jordan Crouse <jcrouse@...eaurora.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        "open list:DRM DRIVER FOR MSM ADRENO GPU" 
        <linux-arm-msm@...r.kernel.org>,
        "open list:DRM DRIVER FOR MSM ADRENO GPU" 
        <freedreno@...ts.freedesktop.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/9] drm/msm/dpu: add real wait_for_commit_done()

On Tue, Aug 27, 2019 at 02:33:32PM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@...omium.org>
> 
> Just waiting for next vblank isn't ideal.. we should really be looking
> at the hw FLUSH register value to know if there is still an in-progress
> flush without stalling unnecessarily when there is no pending flush.
> 
> Signed-off-by: Rob Clark <robdclark@...omium.org>

Reviewed-by: Sean Paul <sean@...rly.run>

> ---
>  .../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c  | 22 ++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> index 737fe963a490..7c73b09894f0 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> @@ -526,6 +526,26 @@ static int dpu_encoder_phys_vid_wait_for_vblank(
>  	return _dpu_encoder_phys_vid_wait_for_vblank(phys_enc, true);
>  }
>  
> +static int dpu_encoder_phys_vid_wait_for_commit_done(
> +		struct dpu_encoder_phys *phys_enc)
> +{
> +	struct dpu_hw_ctl *hw_ctl = phys_enc->hw_ctl;
> +	int ret;
> +
> +	if (!hw_ctl)
> +		return 0;
> +
> +	ret = wait_event_timeout(phys_enc->pending_kickoff_wq,
> +		(hw_ctl->ops.get_flush_register(hw_ctl) == 0),
> +		msecs_to_jiffies(50));
> +	if (ret <= 0) {
> +		DPU_ERROR("vblank timeout\n");
> +		return -ETIMEDOUT;
> +	}
> +
> +	return 0;
> +}
> +
>  static void dpu_encoder_phys_vid_prepare_for_kickoff(
>  		struct dpu_encoder_phys *phys_enc)
>  {
> @@ -676,7 +696,7 @@ static void dpu_encoder_phys_vid_init_ops(struct dpu_encoder_phys_ops *ops)
>  	ops->destroy = dpu_encoder_phys_vid_destroy;
>  	ops->get_hw_resources = dpu_encoder_phys_vid_get_hw_resources;
>  	ops->control_vblank_irq = dpu_encoder_phys_vid_control_vblank_irq;
> -	ops->wait_for_commit_done = dpu_encoder_phys_vid_wait_for_vblank;
> +	ops->wait_for_commit_done = dpu_encoder_phys_vid_wait_for_commit_done;
>  	ops->wait_for_vblank = dpu_encoder_phys_vid_wait_for_vblank;
>  	ops->wait_for_tx_complete = dpu_encoder_phys_vid_wait_for_vblank;
>  	ops->irq_control = dpu_encoder_phys_vid_irq_control;
> -- 
> 2.21.0
> 

-- 
Sean Paul, Software Engineer, Google / Chromium OS

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