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Message-ID: <20190830125626.GC2870@ninjato>
Date: Fri, 30 Aug 2019 14:56:26 +0200
From: Wolfram Sang <wsa@...-dreams.de>
To: Rayagonda Kokatanur <rayagonda.kokatanur@...adcom.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>, linux-i2c@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
bcm-kernel-feedback-list@...adcom.com,
Ray Jui <ray.jui@...adcom.com>,
Florian Fainelli <f.fainelli@...il.com>,
Lori Hikichi <lori.hikichi@...adcom.com>,
Icarus Chau <icarus.chau@...adcom.com>,
Shivaraj Shetty <sshetty1@...adcom.com>
Subject: Re: [PATCH v1 1/1] i2c: iproc: Add i2c repeated start capability
Hi everyone,
> +/*
> + * If 'process_call' is true, then this is a multi-msg transfer that requires
> + * a repeated start between the messages.
> + * More specifically, it must be a write (reg) followed by a read (data).
> + * The i2c quirks are set to enforce this rule.
> + */
With all the limitations in place, I wonder if it might be easier to
implement an smbus_xfer callback instead? What is left that makes this
controller more than SMBus and real I2C?
> + /* Process the read message if this is process call */
Also, the term "process call" here seriously sounds like SMBus.
> + addr = msg->addr << 1 | 1;
addr = i2c_8bit_addr_from_msg(msg);
> + u32 protocol;
Hmm, another SMBus terminology.
> + if (num > 2) {
> + dev_err(iproc_i2c->device,
> + "Only support up to 2 messages. Current msg count %d\n",
> + num);
> + return -EOPNOTSUPP;
> + }
With your quirks flags set, the core checks it for you.
Kind regards,
Wolfram
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