linux-kernel - Re: [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash

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Message-ID: <20190831154432.GS3177@lahna.fi.intel.com>
Date:   Sat, 31 Aug 2019 18:44:32 +0300
From:   Mika Westerberg <mika.westerberg@...ux.intel.com>
To:     Jethro Beekman <jethro@...tanix.com>
Cc:     Marek Vasut <marek.vasut@...il.com>,
        Tudor Ambarus <tudor.ambarus@...rochip.com>,
        David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Richard Weinberger <richard@....at>,
        Vignesh Raghavendra <vigneshr@...com>,
        Allison Randal <allison@...utok.net>,
        Thomas Gleixner <tglx@...utronix.de>,
        Enrico Weigelt <info@...ux.net>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel
 Cannon Lake SPI flash

On Sat, Aug 31, 2019 at 03:29:21PM +0000, Jethro Beekman wrote:
> > > +		ispi->sregs = NULL;
> > > +		ispi->pregs = ispi->base + CNL_PR;
> > > +		ispi->nregions = CNL_FREG_NUM;
> > > +		ispi->pr_num = CNL_PR_NUM;
> > 
> > Does CNL really have a different number of PR and FR regions than the
> > previous generations?
> 
> I'm using this as a reference: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/300-series-chipset-pch-datasheet-vol-2.pdf
> . If you have more accurate information, please let me know.

No looks correct to me. I think it is a good idea to mention this in the
changelog, though.