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Message-ID: <87imqbtqlw.fsf@mpe.ellerman.id.au>
Date: Mon, 02 Sep 2019 11:48:59 +1000
From: Michael Ellerman <mpe@...erman.id.au>
To: Alastair D'Silva <alastair@....ibm.com>,
Christophe Leroy <christophe.leroy@....fr>,
Segher Boessenkool <segher@...nel.crashing.org>
Cc: linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: RE: [RFC PATCH] powerpc: Convert ____flush_dcache_icache_phys() to C
"Alastair D'Silva" <alastair@....ibm.com> writes:
> On Wed, 2019-08-21 at 22:27 +0200, Christophe Leroy wrote:
>>
>> Le 20/08/2019 à 06:36, Alastair D'Silva a écrit :
>> > On Fri, 2019-08-16 at 15:52 +0000, Christophe Leroy wrote:
>>
>> [...]
>>
>> >
>> > Thanks Christophe,
>> >
>> > I'm trying a somewhat different approach that requires less
>> > knowledge
>> > of assembler. Handling of CPU_FTR_COHERENT_ICACHE is outside this
>> > function. The code below is not a patch as my tree is a bit messy,
>> > sorry:
>>
>> Can we be 100% sure that GCC won't add any code accessing some
>> global data or stack while the Data MMU is OFF ?
>
> +mpe
>
> I'm not sure how we would go about making such a guarantee, but I've
> tied every variable used to a register and addr is passed in a
> register, so there is no stack usage, and every call in there only
> operates on it's operands.
That's not safe, I can believe it happens to work but the compiler
people will laugh at us if it ever breaks.
Let's leave it in asm.
cheers
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