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Message-Id: <20190902140355.27891-1-e.velu@criteo.com>
Date:   Mon,  2 Sep 2019 16:03:55 +0200
From:   Erwan Velu <erwanaliasr1@...il.com>
To:     unlisted-recipients:; (no To-header on input)
Cc:     Erwan Velu <e.velu@...teo.com>, Len Brown <lenb@...nel.org>,
        linux-pm@...r.kernel.org (open list:TURBOSTAT UTILITY),
        linux-kernel@...r.kernel.org (open list)
Subject: [PATCH] tools/power/x86/turbostat/turbostat: Report MSR_PLATFORM_INFO registers

This commit is about report all registers from MSR_PLATFORM_INFO.
This helps understand the actual state of the processor.

This patch also reports the min efficiency frequency.

Signed-off-by: Erwan Velu <e.velu@...teo.com>
---
 tools/power/x86/turbostat/turbostat.c | 42 +++++++++++++++++++++++++--
 1 file changed, 40 insertions(+), 2 deletions(-)

diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 75fc4fb9901c..5f5b3132bbea 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -2050,13 +2050,51 @@ dump_nhm_platform_info(void)
 	unsigned int ratio;
 
 	get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
+	fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx ", base_cpu, msr);
+	fprintf(outf, " (%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%sCONFIG-TDP-LEVELS:%llu%s%s%s%s%s)\n",
+		(msr & 1 << 0) ? "Bit0, " : "",
+		(msr & 1 << 1) ? "Bit1, " : "",
+		(msr & 1 << 2) ? "Bit2, " : "",
+		(msr & 1 << 3) ? "Bit3, " : "",
+		(msr & 1 << 4) ? "Bit4, " : "",
+		(msr & 1 << 5) ? "Bit5, " : "",
+		(msr & 1 << 6) ? "Bit6, " : "",
+		(msr & 1 << 7) ? "Bit7, " : "",
+		(msr & 1 << 16) ? "SMM-SAVE-CAP, " : "",
+		(msr & 1 << 17) ? "TAPUNLOCK, " : "",
+		(msr & 1 << 18) ? "Bit18, " : "",
+		(msr & 1 << 19) ? "Bit19, " : "",
+		(msr & 1 << 20) ? "Bit20, " : "",
+		(msr & 1 << 21) ? "Bit21, " : "",
+		(msr & 1 << 22) ? "Bit22, " : "",
+		(msr & 1 << 23) ? "PPIN-CAP, " : "",
+		(msr & 1 << 24) ? "OCVOLT-OVRD-AVAIL, " : "",
+		(msr & 1 << 25) ? "Bit25, " : "",
+		(msr & 1 << 26) ? "DCU_MODE_SELECT, " : "",
+		(msr & 1 << 27) ? "SAMPLE-PART, " : "",
+		(msr & 1 << 28) ? "PRG-TURBO-RATIO, " : "",
+		(msr & 1 << 29) ? "PRG-TDP-LIM, " : "",
+		(msr & 1 << 30) ? "PRG-TJ-OFFSET, " : "",
+		(msr & 1 << 31) ? "CPUID-FAULTING, " : "",
+		(msr & 1 << 32) ? "LOW-POWER-MODE-SUPPORT, " : "",
+		(msr >> 33) & 0x3,
+		(msr & 1 << 35) ? "PFAT, " : "",
+		(msr & 1 << 36) ? "Bit36, " : "",
+		(msr & 1 << 37) ? "TIMED_MWAIT, " : "",
+		(msr & 1 << 38) ? "Bit38, " : "",
+		(msr & 1 << 38) ? "Bit39, " : "");
+
+	// MIN_OPERATING_RATIO
+	ratio = (msr >> 48) & 0xFF;
+	fprintf(outf, "%d * %.1f = %.1f MHz min efficiency frequency\n",
+		ratio, bclk, ratio * bclk);
 
-	fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
-
+	// MAX_EFFICIENCY_RATIO
 	ratio = (msr >> 40) & 0xFF;
 	fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
 		ratio, bclk, ratio * bclk);
 
+	// MAX_NON_TURBO_LIMIT_RATION
 	ratio = (msr >> 8) & 0xFF;
 	fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
 		ratio, bclk, ratio * bclk);
-- 
2.21.0

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