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Message-ID: <20190903201121.GD3547@lt-gp.iram.es>
Date: Tue, 3 Sep 2019 22:11:21 +0200
From: Gabriel Paubert <paubert@...m.es>
To: Segher Boessenkool <segher@...nel.crashing.org>
Cc: Christophe Leroy <christophe.leroy@....fr>,
Alastair D'Silva <alastair@....ibm.com>,
David Hildenbrand <david@...hat.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-kernel@...r.kernel.org, Nicholas Piggin <npiggin@...il.com>,
Mike Rapoport <rppt@...ux.vnet.ibm.com>,
Paul Mackerras <paulus@...ba.org>, alastair@...ilva.org,
Qian Cai <cai@....pw>, Thomas Gleixner <tglx@...utronix.de>,
linuxppc-dev@...ts.ozlabs.org,
Andrew Morton <akpm@...ux-foundation.org>,
Allison Randal <allison@...utok.net>
Subject: Re: [PATCH v2 3/6] powerpc: Convert flush_icache_range & friends to C
On Tue, Sep 03, 2019 at 01:31:57PM -0500, Segher Boessenkool wrote:
> On Tue, Sep 03, 2019 at 07:05:19PM +0200, Christophe Leroy wrote:
> > Le 03/09/2019 à 18:04, Segher Boessenkool a écrit :
> > >(Why are they separate though? It could just be one loop var).
> >
> > Yes it could just be a single loop var, but in that case it would have
> > to be reset at the start of the second loop, which means we would have
> > to pass 'addr' for resetting the loop anyway,
>
> Right, I noticed that after hitting send, as usual.
>
> > so I opted to do it
> > outside the inline asm by using to separate loop vars set to their
> > starting value outside the inline asm.
>
> The thing is, the way it is written now, it will get separate registers
> for each loop (with proper earlyclobbers added). Not that that really
> matters of course, it just feels wrong :-)
After "mtmsr %3", it is always possible to copy %0 to %3 and use it as
an address register for the second loop. One register less to allocate
for the compiler. Constraints of course have to be adjusted.
Gabriel
>
>
> Segher
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