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Date: Tue, 3 Sep 2019 21:57:58 -0700 From: Marcus Eagan <marcuseagan@...il.com> To: linux-kernel@...r.kernel.org Cc: marcussorealheis <marcuseagan@...il.com> Subject: [PATCH] remove the acheive sp error From: marcussorealheis <marcuseagan@...il.com> --- drivers/clk/rockchip/clk-cpu.c | 2 +- drivers/clk/samsung/clk-cpu.c | 2 +- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 2 +- fs/xfs/xfs_inode.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-cpu.c b/drivers/clk/rockchip/clk-cpu.c index 0dc478a19451..e5b69f281b0f 100644 --- a/drivers/clk/rockchip/clk-cpu.c +++ b/drivers/clk/rockchip/clk-cpu.c @@ -19,7 +19,7 @@ * clock and the corresponding rate changes of the auxillary clocks of the CPU * domain. The platform clock driver provides a clock register configuration * for each configurable rate which is then used to program the clock hardware - * registers to acheive a fast co-oridinated rate change for all the CPU domain + * registers to achieve a fast co-oridinated rate change for all the CPU domain * clocks. * * On a rate change request for the CPU clock, the rate change is propagated diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c index efc4fa61fbaf..d2c0193a3930 100644 --- a/drivers/clk/samsung/clk-cpu.c +++ b/drivers/clk/samsung/clk-cpu.c @@ -19,7 +19,7 @@ * clock and the corresponding rate changes of the auxillary clocks of the CPU * domain. The platform clock driver provides a clock register configuration * for each configurable rate which is then used to program the clock hardware - * registers to acheive a fast co-oridinated rate change for all the CPU domain + * registers to achieve a fast co-oridinated rate change for all the CPU domain * clocks. * * On a rate change request for the CPU clock, the rate change is propagated diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 310afa708831..e9c7d5e0fd93 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -185,7 +185,7 @@ void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector, /* this defines the configuration for RL (Interrupt Rate Limiter). * Rl defines rate of interrupts i.e. number of interrupts-per-second - * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing + * GL and RL(Rate Limiter) are 2 ways to achieve interrupt coalescing */ if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable && diff --git a/fs/xfs/xfs_inode.c b/fs/xfs/xfs_inode.c index 6467d5e1df2d..ab7d60174651 100644 --- a/fs/xfs/xfs_inode.c +++ b/fs/xfs/xfs_inode.c @@ -2574,7 +2574,7 @@ xfs_ifree_cluster( * only using to mark the buffer as stale in the log, and to * attach stale cached inodes on it. That means it will never be * dispatched for IO. If it is, we want to know about it, and we - * want it to fail. We can acheive this by adding a write + * want it to fail. We can achieve this by adding a write * verifier to the buffer. */ bp->b_ops = &xfs_inode_buf_ops; -- 2.22.0
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