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Message-ID: <alpine.DEB.2.21.9999.1909050053100.27305@viisi.sifive.com>
Date:   Thu, 5 Sep 2019 00:54:08 -0700 (PDT)
From:   Paul Walmsley <paul.walmsley@...ive.com>
To:     Mao Han <han_mao@...ky.com>
cc:     linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-csky@...r.kernel.org, Greentime Hu <green.hu@...il.com>,
        Palmer Dabbelt <palmer@...ive.com>,
        Christoph Hellwig <hch@....de>, Guo Ren <guoren@...nel.org>
Subject: Re: [PATCH V7 1/2] riscv: Add support for perf registers sampling

On Thu, 5 Sep 2019, Mao Han wrote:

> This patch implements the perf registers sampling and validation API
> for riscv arch. The valid registers and their register ID are defined in
> perf_regs.h. Perf tool can backtrace in userspace with unwind library
> and the registers/user stack dump support.
> 
> Signed-off-by: Mao Han <han_mao@...ky.com>
> Cc: Paul Walmsley <paul.walmsley@...ive.com>
> Cc: Greentime Hu <green.hu@...il.com>
> Cc: Palmer Dabbelt <palmer@...ive.com>
> Cc: linux-riscv <linux-riscv@...ts.infradead.org>
> Cc: Christoph Hellwig <hch@....de>
> Cc: Guo Ren <guoren@...nel.org>

Thanks, queued for v5.4-rc1 with Greentime's Tested-by: (since the changes 
from v6 to v7 had no functional impact).

- Paul

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