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Date:   Thu, 05 Sep 2019 10:35:12 +0200
From:   Andreas Schwab <schwab@...e.de>
To:     Anup Patel <Anup.Patel@....com>
Cc:     Palmer Dabbelt <palmer@...ive.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Radim K <rkrcmar@...hat.com>,
        Damien Le Moal <Damien.LeMoal@....com>,
        "kvm\@vger.kernel.org" <kvm@...r.kernel.org>,
        Anup Patel <anup@...infault.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        "linux-kernel\@vger.kernel.org" <linux-kernel@...r.kernel.org>,
        Christoph Hellwig <hch@...radead.org>,
        Atish Patra <Atish.Patra@....com>,
        Alexander Graf <graf@...zon.com>,
        Alistair Francis <Alistair.Francis@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        "linux-riscv\@lists.infradead.org" <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v7 18/21] RISC-V: KVM: Add SBI v0.1 support

On Sep 04 2019, Anup Patel <Anup.Patel@....com> wrote:

> From: Atish Patra <atish.patra@....com>
>
> The KVM host kernel running in HS-mode needs to handle SBI calls coming
> from guest kernel running in VS-mode.
>
> This patch adds SBI v0.1 support in KVM RISC-V. All the SBI calls are
> implemented correctly except remote tlb flushes. For remote TLB flushes,
> we are doing full TLB flush and this will be optimized in future.

Note that this conflicts with
https://patchwork.kernel.org/patch/11107221/ which removes <asm/sbi.h>
from <asm/tlbflush.h>.  You should probably include that header
explicitly in arch/riscv/kvm/vcpu_sbi.c.

Andreas.

-- 
Andreas Schwab, SUSE Labs, schwab@...e.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

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