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Message-ID: <VI1PR04MB702336953B1C7E0E2212A10BEEBA0@VI1PR04MB7023.eurprd04.prod.outlook.com>
Date: Fri, 6 Sep 2019 13:56:47 +0000
From: Leonard Crestez <leonard.crestez@....com>
To: Anson Huang <anson.huang@....com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>
CC: "mturquette@...libre.com" <mturquette@...libre.com>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
Abel Vesa <abel.vesa@....com>, Peng Fan <peng.fan@....com>,
Jacky Bai <ping.bai@....com>, Fancy Fang <chen.fang@....com>,
"S.j. Wang" <shengjiu.wang@....com>,
Aisheng Dong <aisheng.dong@....com>,
"sfr@...b.auug.org.au" <sfr@...b.auug.org.au>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
dl-linux-imx <linux-imx@....com>
Subject: Re: [PATCH V2 1/2] clk: imx8mm: Move 1443X/1416X PLL clock structure
to common place
On 06.09.2019 04:35, Anson Huang wrote:
> Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,
> i.MX8MN and later i.MX8M SoCs, moving these PLL definitions
> to pll14xx driver can save a lot of duplicated code on each
> platform.
>
> Meanwhile, no need to define PLL clock structure for every
> module which uses same type of PLL, e.g., audio/video/dram use
> 1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock
> structure for each group is enough. >
> Signed-off-by: Anson Huang <Anson.Huang@....com>
For both:
Reviewed-by: Leonard Crestez <leonard.crestez@....com>
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