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Message-ID: <CAKfTPtCwHS8k-0g=j2On=5GyHmTd4bfYNY5vfZRA11iT5jPxQw@mail.gmail.com>
Date: Fri, 6 Sep 2019 16:32:30 +0200
From: Vincent Guittot <vincent.guittot@...aro.org>
To: Valentin Schneider <valentin.schneider@....com>
Cc: Parth Shah <parth@...ux.ibm.com>,
Patrick Bellasi <patrick.bellasi@....com>,
Peter Zijlstra <peterz@...radead.org>,
Subhra Mazumdar <subhra.mazumdar@...cle.com>,
linux-kernel <linux-kernel@...r.kernel.org>,
Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
steven.sistare@...cle.com, Dhaval Giani <dhaval.giani@...cle.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
viresh kumar <viresh.kumar@...aro.org>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Mel Gorman <mgorman@...hsingularity.net>
Subject: Re: [RFC PATCH 1/9] sched,cgroup: Add interface for latency-nice
On Fri, 6 Sep 2019 at 16:13, Valentin Schneider
<valentin.schneider@....com> wrote:
>
> On 06/09/2019 13:45, Parth Shah wrote:>
> > I guess there is some usecase in case of thermal throttling.
> > If a task is heating up the core then in ideal scenarios POWER systems throttle
> > down to rated frequency.
> > In such case, if the task is latency sensitive (min latency nice), we can move the
> > task around the chip to heat up the chip uniformly allowing me to gain more performance
> > with sustained higher frequency.
> > With this, we will require the help from active load balancer and latency-nice
> > classification on per task and/or group basis.
> >
> > Hopefully, this might be useful for other arch as well, right?
> >
>
> Most of the functionality is already there, we're only really missing thermal
> pressure awareness. There was [1] but it seems to have died.
Thara still works on it but she has been sidetracked on other
activities and It takes more time than expected to run all tests with
different averaging window and process the results
>
>
> At least with CFS load balancing, if thermal throttling is correctly
> reflected as a CPU capacity reduction you will tend to move things away from
> that CPU, since load is balanced over capacities.
>
>
> For active balance, we actually already have a condition that moves a task
> to a less capacity-pressured CPU (although it is somewhat specific). So if
> thermal pressure follows that task (e.g. it's doing tons of vector/float),
> it will be rotated around.
>
> However there should be a point made on latency vs throughput. If you
> care about latency you probably do not want to active balance your task. If
> you care about throughput, it should be specified in some way (util-clamp
> says hello!).
>
> It sort of feels like you'd want an extension of misfit migration (salesman
> hat goes on from here) - misfit moves tasks that are CPU bound (IOW their
> util is >= 80% of the CPU capacity) to CPUs of higher capacity. It's only
> enabled for systems with asymmetric capacities, but could be enabled globally
> for "dynamically-created asymmetric capacities" (IOW RT/IRQ/thermal pressure
> on SMP systems).
>
> On top of that, if we make misfit consider e.g. uclamp.min (I don't think
> that's already the case), then you have your throughput knob to have *some*
> designated tasks move away from (thermal & else) pressure.
>
>
> [1]: https://lore.kernel.org/lkml/1555443521-579-1-git-send-email-thara.gopinath@linaro.org/
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