linux-kernel - Re: [Letux-kernel] [RFC PATCH 0/3] Enable 1GHz support on omap36xx

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Message-Id: <FA2920FE-B76A-4D44-A264-862A1CCBF7FC@goldelico.com>
Date:   Sat, 7 Sep 2019 09:37:39 +0200
From:   "H. Nikolaus Schaller" <hns@...delico.com>
To:     Adam Ford <aford173@...il.com>
Cc:     André Roth <neolynx@...il.com>,
        Tony Lindgren <tony@...mide.com>,
        Linux-OMAP <linux-omap@...r.kernel.org>,
        Discussions about the Letux Kernel 
        <letux-kernel@...nphoenux.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Andreas Kemnade <andreas@...nade.info>
Subject: Re: [Letux-kernel] [RFC PATCH 0/3] Enable 1GHz support on omap36xx

Hi Adam,

> Am 02.09.2019 um 23:10 schrieb Adam Ford <aford173@...il.com>:
> 
> On Mon, Sep 2, 2019 at 10:46 AM H. Nikolaus Schaller <hns@...delico.com> wrote:
>> 
>> 
>> 
>> But my tests show that decoding works now. So you already might give it a try.
> 
> I am traveling all this week, but I have an omap3530, DM3730
> (omap3630), and an AM3517 that I use for testing.

now as the omap3430 and omap3630 opp-v2 tables are installed,
we could add am35x7 as well.

What needs to be done:

1. add OPP-v2 table to am3517.dtsi

for example copy skeleton from omap36xx.dtsi

and define reasonable clock speeds. I would think about
150 MHz, 300 MHz, 600MHz.

Debatable is if we need a clock-latency definition.

2. change all voltages to 1.2V

			opp-microvolt = <1200000 1200000 1200000>;

There is no point to specify 3 voltages <target min max> here since we
will never need a min and a max value.

			opp-microvolt = <1200000>;

should also be ok (AFAIK, parser handles single-value records).

3. AFAIK there is no speed binned eFuse...

But the ti-cpufreq driver always wants to read some eFuse register.

So please check if you can read 0x4800244C and 0x4830A204
like on omap36xx and if they produce stable values (and not
random noise).

If yes, we simply assume that am3517 is similar enough to omap3630,
ignore that there is no eFuse, but read the register anyways and
then ignore the bit if it is 0 or 1.

This means that all OPPs can get

			opp-supported-hw = <0xffffffff 0xffffffff>;

There could also be a default handler if this property is missing,
but I have not researched this.

4. add compatible to ti-cpufreq
and share the register offsets, bit masks etc. with omap3630:

	{ .compatible = "ti,am33xx", .data = &am3x_soc_data, },
	{ .compatible = "ti,am3517", .data = &omap36xx_soc_data, },
	{ .compatible = "ti,am43", .data = &am4x_soc_data, },
	{ .compatible = "ti,dra7", .data = &dra7_soc_data },
	{ .compatible = "ti,omap3430", .data = &omap34xx_soc_data, },
	{ .compatible = "ti,omap3630", .data = &omap36xx_soc_data, },

5. configure for CONFIG_ARM_TI_CPUFREQ=y

This should IMHO suffice.

Since I can't test anything I can't define working OPP points
and therefore I can't provide patches myself. Hope you can make
it work this way.

BR,
Nikolaus