linux-kernel - [PATCH V3 0/4] clk: imx8m: fix glitch/mux

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Date:   Mon, 9 Sep 2019 03:39:29 +0000
From:   Peng Fan <peng.fan@....com>
To:     "mturquette@...libre.com" <mturquette@...libre.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>
CC:     "kernel@...gutronix.de" <kernel@...gutronix.de>,
        dl-linux-imx <linux-imx@....com>,
        Anson Huang <anson.huang@....com>,
        Jacky Bai <ping.bai@....com>, Abel Vesa <abel.vesa@....com>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Leonard Crestez <leonard.crestez@....com>,
        Peng Fan <peng.fan@....com>
Subject: [PATCH V3 0/4] clk: imx8m: fix glitch/mux

From: Peng Fan <peng.fan@....com>

V3:
 Add cover-letter

V2:
 Added patch [2,3,4]/4 and avoid glitch when prepare

There is two bypass bit in the pll, BYPASS and EXT_BYPASS.
There is also a restriction that to avoid glitch, need set BYPASS
bit when RESETB changed from 0 to 1, otherwise there will be glitch.

However the BYPASS bit is also used as mux bit in imx8mm/imx8mn clk driver.

This means two paths touch the same bit which is wrong. So switch to use
EXT_BYPASS bit as the mux.

Peng Fan (4):
  clk: imx: pll14xx: avoid glitch when set rate
  clk: imx: clk-pll14xx: unbypass PLL by default
  clk: imx: imx8mm: fix pll mux bit
  clk: imx: imx8mn: fix pll mux bit

 drivers/clk/imx/clk-imx8mm.c  | 32 ++++++++++----------------------
 drivers/clk/imx/clk-imx8mn.c  | 32 ++++++++++----------------------
 drivers/clk/imx/clk-pll14xx.c | 27 ++++++++++++++++++++++++++-
 3 files changed, 46 insertions(+), 45 deletions(-)

-- 
2.16.4