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Message-Id: <20190910102015.1CD3C2081B@mail.kernel.org>
Date: Tue, 10 Sep 2019 03:20:03 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Jorge Ramirez <jorge.ramirez-ortiz@...aro.org>
Cc: agross@...nel.org, mturquette@...libre.com,
bjorn.andersson@...aro.org, niklas.cassel@...aro.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/5] clk: qcom: apcs-msm8916: get parent clock names from DT
Quoting Jorge Ramirez (2019-09-10 02:40:34)
> On 9/10/19 11:34, Jorge Ramirez wrote:
> > On 9/10/19 11:14, Stephen Boyd wrote:
> >>
> >> This is not a backwards compatible change.
> >>
> >>>>> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> >>>>> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> >>>>> @@ -429,7 +429,8 @@
> >>>>> compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
> >>>>> reg = <0xb011000 0x1000>;
> >>>>> #mbox-cells = <1>;
> >>>>> - clocks = <&a53pll>;
> >>>>> + clocks = <&gcc GPLL0_VOTE>, <&a53pll>;
> >>>>> + clock-names = "aux", "pll";
> >>>>> #clock-cells = <0>;
> >>>>> };
> >>>>>
> >>
> >> Because the "clocks" property changed from
> >>
> >> <&a53pll>
> >>
> >> to
> >>
> >> <&gcc GPLL0_VOTE>, <&a53pll>
> >>
> >> and that moves pll to cell 1 instead of cell 0.
> >>
> >>
> >
> > what do you mean by backwards compatible? because this change does not
> > break previous clients.
>
> as per the comments I added to the code (in case this helps framing the
> discussion)
>
> [..]
> legacy bindings only defined the pll parent clock (index = 0) with no
> name; when both of the parents are specified in the bindings, the
> pll is the second one (index = 1).
The 'clock-names' property is entirely irrelevant to this discussion.
The PLL _must_ be index 0 forever so that the binding is left in a
backwards compatible state. Moving the PLL to index 1 and then using
clock-names to find it is a backwards incompatible change. The order of
clks in the 'clocks' property is an ABI.
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