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Message-Id: <20190912.003754.663480494374990855.davem@davemloft.net>
Date: Thu, 12 Sep 2019 00:37:54 +0200 (CEST)
From: David Miller <davem@...emloft.net>
To: vitaly.gaiduk@...udbear.ru
Cc: robh+dt@...nel.org, f.fainelli@...il.com, mark.rutland@....com,
andrew@...n.ch, hkallweit1@...il.com, tpiepho@...inj.com,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/2] net: phy: dp83867: Add SGMII mode type switching
From: Vitaly Gaiduk <vitaly.gaiduk@...udbear.ru>
Date: Mon, 9 Sep 2019 20:19:24 +0300
> This patch adds ability to switch beetween two PHY SGMII modes.
> Some hardware, for example, FPGA IP designs may use 6-wire mode
> which enables differential SGMII clock to MAC.
>
> Signed-off-by: Vitaly Gaiduk <vitaly.gaiduk@...udbear.ru>
Applied.
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