linux-kernel - Re: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for ls1088a

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20190912130159.GF9720@e119886-lin.cambridge.arm.com>
Date:   Thu, 12 Sep 2019 14:01:59 +0100
From:   Andrew Murray <andrew.murray@....com>
To:     Xiaowei Bao <xiaowei.bao@....com>
Cc:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Leo Li <leoyang.li@....com>, "kishon@...com" <kishon@...com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "M.h. Lian" <minghuan.lian@....com>,
        Mingkai Hu <mingkai.hu@....com>, Roy Zang <roy.zang@....com>,
        "jingoohan1@...il.com" <jingoohan1@...il.com>,
        "gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "arnd@...db.de" <arnd@...db.de>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "Z.q. Hou" <zhiqiang.hou@....com>
Subject: Re: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for
 ls1088a

On Tue, Sep 03, 2019 at 02:01:32AM +0000, Xiaowei Bao wrote:
> 
> 
> > -----Original Message-----
> > From: Andrew Murray <andrew.murray@....com>
> > Sent: 2019年9月2日 21:06
> > To: Xiaowei Bao <xiaowei.bao@....com>
> > Cc: robh+dt@...nel.org; mark.rutland@....com; shawnguo@...nel.org; Leo
> > Li <leoyang.li@....com>; kishon@...com; lorenzo.pieralisi@....com; M.h.
> > Lian <minghuan.lian@....com>; Mingkai Hu <mingkai.hu@....com>; Roy
> > Zang <roy.zang@....com>; jingoohan1@...il.com;
> > gustavo.pimentel@...opsys.com; linux-pci@...r.kernel.org;
> > devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> > linux-arm-kernel@...ts.infradead.org; linuxppc-dev@...ts.ozlabs.org;
> > arnd@...db.de; gregkh@...uxfoundation.org; Z.q. Hou
> > <zhiqiang.hou@....com>
> > Subject: Re: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for
> > ls1088a
> > 
> > On Mon, Sep 02, 2019 at 11:17:15AM +0800, Xiaowei Bao wrote:
> > > Add PCIe EP node for ls1088a to support EP mode.
> > >
> > > Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
> > > ---
> > > v2:
> > >  - Remove the pf-offset proparty.
> > > v3:
> > >  - No change.
> > >
> > >  arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31
> > ++++++++++++++++++++++++++
> > >  1 file changed, 31 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > > index c676d07..da246ab 100644
> > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > > @@ -483,6 +483,17 @@
> > >  			status = "disabled";
> > >  		};
> > >
> > > +		pcie_ep@...0000 {
> > > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > 
> > Here you specify a fallback "fsl,ls-pcie-ep" that is removed by this series.
> > 
> > Besides that, this looks OK.
> 
> As explained, the "fsl,ls-pcie-ep" is needed, due to the u-boot will fixup the status
> property base on this compatible, I think we reserve this compatible is helpfully,
> if delate this compatible, I have to modify the code of bootloader.

I assume you mean that u-boot fixes up "fsl,ls-pcie-ep" *only* for ls1046a
devices?

Thanks,

Andrew Murray

> 
> Thanks 
> XIaowei
> 
> > 
> > Thanks,
> > 
> > Andrew Murray
> > 
> > > +			reg = <0x00 0x03400000 0x0 0x00100000
> > > +			       0x20 0x00000000 0x8 0x00000000>;
> > > +			reg-names = "regs", "addr_space";
> > > +			num-ib-windows = <24>;
> > > +			num-ob-windows = <128>;
> > > +			max-functions = /bits/ 8 <2>;
> > > +			status = "disabled";
> > > +		};
> > > +
> > >  		pcie@...0000 {
> > >  			compatible = "fsl,ls1088a-pcie";
> > >  			reg = <0x00 0x03500000 0x0 0x00100000   /* controller
> > registers */
> > > @@ -508,6 +519,16 @@
> > >  			status = "disabled";
> > >  		};
> > >
> > > +		pcie_ep@...0000 {
> > > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > > +			reg = <0x00 0x03500000 0x0 0x00100000
> > > +			       0x28 0x00000000 0x8 0x00000000>;
> > > +			reg-names = "regs", "addr_space";
> > > +			num-ib-windows = <6>;
> > > +			num-ob-windows = <8>;
> > > +			status = "disabled";
> > > +		};
> > > +
> > >  		pcie@...0000 {
> > >  			compatible = "fsl,ls1088a-pcie";
> > >  			reg = <0x00 0x03600000 0x0 0x00100000   /* controller
> > registers */
> > > @@ -533,6 +554,16 @@
> > >  			status = "disabled";
> > >  		};
> > >
> > > +		pcie_ep@...0000 {
> > > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > > +			reg = <0x00 0x03600000 0x0 0x00100000
> > > +			       0x30 0x00000000 0x8 0x00000000>;
> > > +			reg-names = "regs", "addr_space";
> > > +			num-ib-windows = <6>;
> > > +			num-ob-windows = <8>;
> > > +			status = "disabled";
> > > +		};
> > > +
> > >  		smmu: iommu@...0000 {
> > >  			compatible = "arm,mmu-500";
> > >  			reg = <0 0x5000000 0 0x800000>;
> > > --
> > > 2.9.5
> > >