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Message-ID: <mhng-c8b87e96-987e-4577-acc2-1e22c9b81b10@palmer-si-x1e>
Date:   Fri, 13 Sep 2019 14:20:53 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...ive.com>
To:     yash.shah@...ive.com
CC:     robh+dt@...nel.org, mark.rutland@....com,
        Paul Walmsley <paul.walmsley@...ive.com>,
        aou@...s.berkeley.edu, bmeng.cn@...il.com, sagar.kadam@...ive.com,
        devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org,
        Sachin Ghadi <sachin.ghadi@...ive.com>
Subject:     Re: [PATCH] riscv: dts: Add DT support for SiFive FU540 PWM driver

On Tue, 10 Sep 2019 02:52:07 PDT (-0700), yash.shah@...ive.com wrote:
> Hi,
>
> Any comments on this patch?

I don't see "sifive,pwm0" in the DT bindings documentation, and it doesn't 
match our standard way of doing these things (which would have at least 
"sifive,fu540-c000-pwm").

>
> - Yash
>
> On Wed, Aug 21, 2019 at 2:53 PM Yash Shah <yash.shah@...ive.com> wrote:
>>
>> Add the PWM DT node in SiFive FU540 soc-specific DT file.
>> Enable the PWM nodes in HiFive Unleashed board-specific DT file.
>>
>> Signed-off-by: Yash Shah <yash.shah@...ive.com>
>> ---
>>  arch/riscv/boot/dts/sifive/fu540-c000.dtsi          | 19 +++++++++++++++++++
>>  arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts |  8 ++++++++
>>  2 files changed, 27 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
>> index 42b5ec2..bb422db 100644
>> --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
>> +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
>> @@ -230,6 +230,25 @@
>>                         #size-cells = <0>;
>>                         status = "disabled";
>>                 };
>> +               pwm0: pwm@...20000 {
>> +                       compatible = "sifive,pwm0";
>> +                       reg = <0x0 0x10020000 0x0 0x1000>;
>> +                       interrupt-parent = <&plic0>;
>> +                       interrupts = <42 43 44 45>;
>> +                       clocks = <&prci PRCI_CLK_TLCLK>;
>> +                       #pwm-cells = <3>;
>> +                       status = "disabled";
>> +               };
>> +               pwm1: pwm@...21000 {
>> +                       compatible = "sifive,pwm0";
>> +                       reg = <0x0 0x10021000 0x0 0x1000>;
>> +                       interrupt-parent = <&plic0>;
>> +                       interrupts = <46 47 48 49>;
>> +                       reg-names = "control";
>> +                       clocks = <&prci PRCI_CLK_TLCLK>;
>> +                       #pwm-cells = <3>;
>> +                       status = "disabled";
>> +               };
>>
>>         };
>>  };
>> diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
>> index 93d68cb..104d334 100644
>> --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
>> +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
>> @@ -85,3 +85,11 @@
>>                 reg = <0>;
>>         };
>>  };
>> +
>> +&pwm0 {
>> +       status = "okay";
>> +};
>> +
>> +&pwm1 {
>> +       status = "okay";
>> +};
>> --
>> 1.9.1
>>

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