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Message-ID: <20190915231351.GS30224@paulmck-ThinkPad-P72>
Date: Sun, 15 Sep 2019 16:13:51 -0700
From: "Paul E. McKenney" <paulmck@...nel.org>
To: Alan Stern <stern@...land.harvard.edu>
Cc: LKMM Maintainers -- Akira Yokosawa <akiyks@...il.com>,
Andrea Parri <parri.andrea@...il.com>,
Boqun Feng <boqun.feng@...il.com>,
Daniel Lustig <dlustig@...dia.com>,
David Howells <dhowells@...hat.com>,
Jade Alglave <j.alglave@....ac.uk>,
Luc Maranget <luc.maranget@...ia.fr>,
Nicholas Piggin <npiggin@...il.com>,
Peter Zijlstra <peterz@...radead.org>,
Will Deacon <will@...nel.org>,
Kernel development list <linux-kernel@...r.kernel.org>
Subject: Re: Documentation for plain accesses and data races
On Fri, Sep 13, 2019 at 03:13:26PM -0400, Alan Stern wrote:
> On Thu, 12 Sep 2019, Paul E. McKenney wrote:
>
> > On Fri, Sep 06, 2019 at 02:11:29PM -0400, Alan Stern wrote:
>
> > > To this end, the LKMM imposes three extra restrictions, together
> > > called the "plain-coherence" axiom because of their resemblance to the
> > > coherency rules:
> > >
> > > If R and W conflict and it is possible to link R to W by one
> > > of the xb* sequences listed above, then W ->rfe R is not
> > > allowed (i.e., a load cannot read from a store that it
> > > executes before, even if one or both is plain).
> > >
> > > If W and R conflict and it is possible to link W to R by one
> > > of the vis sequences listed above, then R ->fre W is not
> > > allowed (i.e., if a store is visible to a load then the load
> > > must read from that store or one coherence-after it).
> > >
> > > If W and W' conflict and it is possible to link W to W' by one
> > > of the vis sequences listed above, then W' ->co W is not
> > > allowed (i.e., if one store is visible to another then it must
> > > come after in the coherence order).
>
> > I will need to read this last section again. Perhaps more than once. ;-)
>
> I decided this part could use some improvement. Here is the updated
> text:
>
>
> To this end, the LKMM imposes three extra restrictions, together
> called the "plain-coherence" axiom because of their resemblance to the
> rules used by the operational model to ensure cache coherence (that
> is, the rules governing the memory subsystem's choice of a store to
> satisfy a load request and its determination of where a store will
> fall in the coherence order):
>
> If R and W conflict and it is possible to link R to W by one
> of the xb* sequences listed above, then W ->rfe R is not
> allowed (i.e., a load cannot read from a store that it
> executes before, even if one or both is plain).
>
> If W and R conflict and it is possible to link W to R by one
> of the vis sequences listed above, then R ->fre W is not
> allowed (i.e., if a store is visible to a load then the load
> must read from that store or one coherence-after it).
>
> If W and W' conflict and it is possible to link W to W' by one
> of the vis sequences listed above, then W' ->co W is not
> allowed (i.e., if one store is visible to a second then the
> second must come after the first in the coherence order).
These look good to me!
Thanx, Paul
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