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Message-Id: <20190916134128.18120-3-kan.liang@linux.intel.com>
Date: Mon, 16 Sep 2019 06:41:16 -0700
From: kan.liang@...ux.intel.com
To: peterz@...radead.org, acme@...nel.org, mingo@...hat.com,
linux-kernel@...r.kernel.org
Cc: tglx@...utronix.de, jolsa@...nel.org, eranian@...gle.com,
alexander.shishkin@...ux.intel.com, ak@...ux.intel.com,
Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH V4 02/14] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS
From: Kan Liang <kan.liang@...ux.intel.com>
TOPDOWN.SLOTS(0x0400) is not a generic event. It is only available on
fixed counter3.
Don't extend its mask to generic counters.
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
---
Changes since V3:
- Separate fixed counter3 definition patch
arch/x86/events/intel/core.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 43c966d1208e..f0208ee554fc 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5106,12 +5106,14 @@ __init int intel_pmu_init(void)
if (x86_pmu.event_constraints) {
/*
- * event on fixed counter2 (REF_CYCLES) only works on this
+ * event on fixed counter2 (REF_CYCLES) and
+ * fixed counter3 (TOPDOWN.SLOTS) only work on this
* counter, so do not extend mask to generic counters
*/
for_each_event_constraint(c, x86_pmu.event_constraints) {
if (c->cmask == FIXED_EVENT_FLAGS
- && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES) {
+ && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES
+ && c->idxmsk64 != INTEL_PMC_MSK_FIXED_SLOTS) {
c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1;
}
c->idxmsk64 &=
--
2.17.1
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