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Message-Id: <ed2fb3e4f4f6710f97178acef8f3ee8966cc9641.camel@au1.ibm.com>
Date: Mon, 16 Sep 2019 13:25:57 +1000
From: "Alastair D'Silva" <alastair@....ibm.com>
To: Christophe Leroy <christophe.leroy@....fr>
Cc: stable@...r.kernel.org,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Thomas Gleixner <tglx@...utronix.de>, Qian Cai <cai@....pw>,
Nicholas Piggin <npiggin@...il.com>,
Allison Randal <allison@...utok.net>,
Andrew Morton <akpm@...ux-foundation.org>,
Mike Rapoport <rppt@...ux.vnet.ibm.com>,
Michal Hocko <mhocko@...e.com>,
David Hildenbrand <david@...hat.com>,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: RE: [PATCH v2 1/6] powerpc: Allow flush_icache_range to work across ranges
>4GB
On Sat, 2019-09-14 at 09:46 +0200, Christophe Leroy wrote:
>
> Le 03/09/2019 à 07:23, Alastair D'Silva a écrit :
> > From: Alastair D'Silva <alastair@...ilva.org>
> >
> > When calling flush_icache_range with a size >4GB, we were masking
> > off the upper 32 bits, so we would incorrectly flush a range
> > smaller
> > than intended.
> >
> > This patch replaces the 32 bit shifts with 64 bit ones, so that
> > the full size is accounted for.
>
> Isn't there the same issue in arch/powerpc/kernel/vdso64/cacheflush.S
> ?
>
> Christophe
Yes, there is. I'll fix it, but I wonder whether anything calls it? I
asked Google, and every mention of it was in the kernel source or
mailing list.
Maybe BenH can chime in?
--
Alastair D'Silva
Open Source Developer
Linux Technology Centre, IBM Australia
mob: 0423 762 819
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