linux-kernel - Re: [PATCH] clk: at91: allow 24 Mhz clock as input for PLL

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Message-Id: <20190916195246.CAE5C206C2@mail.kernel.org>
Date:   Mon, 16 Sep 2019 12:52:45 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Eugen.Hristev@...rochip.com, alexandre.belloni@...tlin.com,
        linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, mturquette@...libre.com
Cc:     Nicolas.Ferre@...rochip.com, Eugen.Hristev@...rochip.com
Subject: Re: [PATCH] clk: at91: allow 24 Mhz clock as input for PLL

Quoting Eugen.Hristev@...rochip.com (2019-09-10 23:39:20)
> From: Eugen Hristev <eugen.hristev@...rochip.com>
> 
> The PLL input range needs to be able to allow 24 Mhz crystal as input
> Update the range accordingly in plla characteristics struct
> 
> Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>
> ---

Is there a Fixes: tag for this? Seems like it was always wrong?