lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-Id: <20190916201547.5AF9020665@mail.kernel.org>
Date:   Mon, 16 Sep 2019 13:15:46 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Eugen.Hristev@...rochip.com, alexandre.belloni@...tlin.com,
        linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, mturquette@...libre.com
Cc:     Nicolas.Ferre@...rochip.com, Ludovic.Desroches@...rochip.com,
        Eugen.Hristev@...rochip.com
Subject: Re: [PATCH 2/2] clk: at91: select parent if main oscillator or bypass is enabled

Quoting Eugen.Hristev@...rochip.com (2019-09-09 08:30:34)
> From: Eugen Hristev <eugen.hristev@...rochip.com>
> 
> Selecting the right parent for the main clock is done using only
> main oscillator enabled bit.
> In case we have this oscillator bypassed by an external signal (no driving
> on the XOUT line), we still use external clock, but with BYPASS bit set.
> So, in this case we must select the same parent as before.
> Create a macro that will select the right parent considering both bits from
> the MOR register.
> Use this macro when looking for the right parent.
> 
> Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>
> ---

Applied to clk-next

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ