linux-kernel - Re: [PATCH 2/2] MIPS: remove support for DMA_ATTR_WRITE

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Message-ID: <alpine.LFD.2.21.1909182001260.31718@eddie.linux-mips.org>
Date:   Wed, 18 Sep 2019 20:50:01 +0100 (BST)
From:   "Maciej W. Rozycki" <macro@...ux-mips.org>
To:     Christoph Hellwig <hch@....de>
cc:     iommu@...ts.linux-foundation.org,
        Shawn Anastasio <shawn@...stas.io>,
        Michael Ellerman <mpe@...erman.id.au>,
        Russell King <linux@...linux.org.uk>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        Paul Burton <paul.burton@...s.com>,
        James Hogan <jhogan@...nel.org>, linuxppc-dev@...ts.ozlabs.org,
        linux-mips@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] MIPS: remove support for DMA_ATTR_WRITE_COMBINE

On Wed, 7 Aug 2019, Christoph Hellwig wrote:

> Mips uses the KSEG1 kernel memory segment to map dma coherent
> allocations for non-coherent devices as uncacheable, and does not have
> any kind of special support for DMA_ATTR_WRITE_COMBINE in the allocation
> path.  Thus supporting DMA_ATTR_WRITE_COMBINE in dma_mmap_attrs will
> lead to multiple mappings with different caching attributes.

 FYI, AFAIK _CACHE_UNCACHED_ACCELERATED (where supported) is effectively 
write-combine.  Though IIUC someone would have to wire it in first.

  Maciej