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Message-ID: <alpine.DEB.2.21.9999.1909190537250.12151@viisi.sifive.com>
Date: Thu, 19 Sep 2019 05:37:34 -0700 (PDT)
From: Paul Walmsley <paul.walmsley@...ive.com>
To: Anup Patel <Anup.Patel@....com>
cc: Palmer Dabbelt <palmer@...ive.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Radim K <rkrcmar@...hat.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Alexander Graf <graf@...zon.com>,
Atish Patra <Atish.Patra@....com>,
Alistair Francis <Alistair.Francis@....com>,
Damien Le Moal <Damien.LeMoal@....com>,
Christoph Hellwig <hch@...radead.org>,
Anup Patel <anup@...infault.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v7 01/21] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG
interface
On Wed, 4 Sep 2019, Anup Patel wrote:
> We will be using ONE_REG interface accessing VCPU registers from
> user-space hence we add KVM_REG_RISCV for RISC-V VCPU registers.
>
> Signed-off-by: Anup Patel <anup.patel@....com>
> Acked-by: Paolo Bonzini <pbonzini@...hat.com>
> Reviewed-by: Paolo Bonzini <pbonzini@...hat.com>
> Reviewed-by: Alexander Graf <graf@...zon.com>
Thanks, queued for v5.4-rc.
- Paul
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