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Message-ID: <547f3df2-d36d-4b58-eeaf-8bd8a778cfa8@linux.intel.com>
Date: Thu, 19 Sep 2019 09:30:45 -0700
From: Tim Chen <tim.c.chen@...ux.intel.com>
To: David Laight <David.Laight@...LAB.COM>,
Parth Shah <parth@...ux.ibm.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Peter Zijlstra <peterz@...radead.org>,
Patrick Bellasi <patrick.bellasi@....com>,
subhra mazumdar <subhra.mazumdar@...cle.com>,
Valentin Schneider <valentin.schneider@....com>
Cc: "mingo@...hat.com" <mingo@...hat.com>,
"morten.rasmussen@....com" <morten.rasmussen@....com>,
"dietmar.eggemann@....com" <dietmar.eggemann@....com>,
"pjt@...gle.com" <pjt@...gle.com>,
"vincent.guittot@...aro.org" <vincent.guittot@...aro.org>,
"quentin.perret@....com" <quentin.perret@....com>,
"dhaval.giani@...cle.com" <dhaval.giani@...cle.com>,
"daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
"tj@...nel.org" <tj@...nel.org>,
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Subject: Re: Usecases for the per-task latency-nice attribute
On 9/19/19 2:06 AM, David Laight wrote:
> From: Tim Chen
>> Sent: 18 September 2019 18:16
> ...
>> Some users are running machine learning batch tasks with AVX512, and have observed
>> that these tasks affect the tasks needing a fast response. They have to
>> rely on manual CPU affinity to separate these tasks. With appropriate
>> latency hint on task, the scheduler can be taught to separate them.
>
> Will (or can) the scheduler pre-empt a low priority process that is spinning
> in userspace in order to allow a high priority (or low latency) process run
> on that cpu?
>
> My suspicion is that the process switch can't happen until (at least) the
> next hardware interrupt - and possibly only a timer tick into the scheduler.
>
The issue has to do with AVX512 running on the HT sibling, which pulls down
the core frequency. So latency sensitive tasks are not blocked but are
running concurrently on siblings, but slower. With latency hint, the scheduler
can try to avoid putting them on the same core.
Tim
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