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Message-Id: <20190921170152.5033-8-krzk@kernel.org>
Date: Sat, 21 Sep 2019 19:01:52 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Kukjin Kim <kgene@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org
Cc: Marek Szyprowski <m.szyprowski@...sung.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Sylwester Nawrocki <snawrocki@...nel.org>
Subject: [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier
Replace hard-coded number with appropriate define for GIC SPI or PPI
specifier in interrupt. This makes code easier to read. No expected
functionality change.
Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
---
arch/arm/boot/dts/exynos4210.dtsi | 8 ++++----
arch/arm/boot/dts/exynos4412.dtsi | 4 ++--
arch/arm/boot/dts/exynos5250.dtsi | 4 ++--
arch/arm/boot/dts/exynos54xx.dtsi | 16 ++++++++--------
4 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 38c49ab8c733..650bee6355e4 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -116,12 +116,12 @@
#interrupt-cells = <1>;
interrupt-parent = <&mct>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
- interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
- <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
+ interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <1 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
- <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
- <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
+ <4 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@...60000 {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 7e2dabefd53f..0810c14bf424 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -253,11 +253,11 @@
#interrupt-cells = <1>;
interrupt-parent = <&mct>;
interrupts = <0>, <1>, <2>, <3>, <4>;
- interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<1 &combiner 12 5>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
- <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
+ <4 &gic GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@...60000 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index e0fcf3c2f537..61f22feefda9 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -247,8 +247,8 @@
<1 &combiner 23 4>,
<2 &combiner 25 2>,
<3 &combiner 25 3>,
- <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
+ <4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_0: pinctrl@...00000 {
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index a1c10a9a86f8..f52c7ce5d320 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -77,14 +77,14 @@
<1 &combiner 23 4>,
<2 &combiner 25 2>,
<3 &combiner 25 3>,
- <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
- <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
- <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
- <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
- <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
- <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
- <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
+ <4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <6 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <7 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <8 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <9 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <10 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <11 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@...d0000 {
--
2.17.1
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